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Senior Debug, Trace & Profiling Architect

$193.5k - $236.5k

SiFive, Inc.

SiFive, Inc. is looking for a Hardware Design Technical Lead in Santa Clara, California. This role is crucial for designing industry-leading debug, trace, and profiling IP to promote RISC-V architecture in SoC designs. The ideal candidate will have over 7 years of experience in architecture, microarchitecture, and RTL design, and hold an MS or PhD in a related field. A competitive salary range of $193,500 – $236,500, along with comprehensive benefits is offered. #J-18808-Ljbffr SiFive, Inc.

Vacancy posted 4 days ago
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