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Power Architect, SoC DVFS & Thermal Control

Velaura

Velaura in Santa Clara, CA is seeking an RTL Engineer focused on power management for the next-generation Physical AI SoC. You will own power management at all levels, collaborating with architects, performance modelers, software and firmware teams to translate architectural concepts into silicon. You will design on-chip power management hardware, clock and reset architectures, and DVFS-based power state control, ensuring robust thermal and power behavior across the die and packages. #J-18808-Ljbffr Velaura

Vacancy posted 1 day ago
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