Lead ATE Test Development Engineer - LPU

Lead ATE Test Development Engineer for NVIDIA’s LPU team. We need a motivated individual who will help transfer LPU products from design engineering to mass production. Along with ATE test development, you will be exposed to all aspects of the LPU silicon lifecycle, from process engineering to SLT testing to silicon validation to system production testing and finally to datacenter deployment. In addition, your responsibilities will include working with overseas manufacturing teams to increase yields, test coverage, and capacity, and reduce production costs. If you are passionate about building the highest quality server products that will change the world, then we really want to hear from you. What You’ll be Doing: Serve as the lead for defining, developing, implementing and supporting ATE test development. This includes defining test programs, driving test hardware development, leading the bring up of new silicon, characterization and enabling production release of our latest LPU product. Develop test methods and provide guidance on streamlining test program development to provide the best possible coverage on ATE to reduce DPPM downstream. Work closely with the SLT and system validation teams to understand how failures at the system level can be replicated on ATE to implement critical tests and/or test conditions on ATE. Work collaboratively with the system architects, silicon design, and operations teams to understand the chip application in field and implement new test strategies on ATE to improve reliability and DPPM in the field. Actively participate with cross‑functional teams including Product Development Engineering, DFT, and IC design to efficiently debug product failures and implement optimal solutions. What we need to see: Bachelor Degree or higher in Electrical Engineering/Computer Engineering (or equivalent experience). 12+ years of relevant experience in IC Design, application or ATE testing of VLSI. Working knowledge and hands‑on experience with Advantest 93K ATE platform (SmarTest 7 and 8) are essential. Critical thinking, good communication and collaboration skills. Excellent debugging and analytical skills. Understanding of DFT insertion techniques including SCAN, ATPG, MBIST and IOBIST. Ways to Stand Out from the Crowd: Test Hardware design knowledge specifically for Signal and Power integrity. System level testing/validation exposure. Product engineering experience, such as yield analysis, vmin/fmax characterization, defect analysis. Linux operating systems, and programming languages such as Perl/Python and/or C/C++, Java. Industry experience with high power, high volume deployment of high quality and reliable SOCs via ATE test development. NVIDIA offers highly competitive salaries and a comprehensive benefits package. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 196,000USD – 310,500USD for Level5, and 232,000USD – 368,000USD for Level6. You will also be eligible for equity and benefits. NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. #J-18808-Ljbffr