Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

CPU Microarchitect/RTL Engineer - Execution, Load/Store

$147.4k - $272.1k

Apple Inc.

Santa Clara, California, United States Hardware Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want to join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power our innovative products, including the iPhone, iPad, Watch, Vision Pro, and Mac. We are looking for an experienced engineer to drive architecture and RTL development of CPU integer, floating-point, and/or load/store execution for our performant cores. Description As a CPU Microarchitect/RTL Engineer, you will own or participate in the following: Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals Verification - support the verification team in test bench development, formal methods, and simulation/emulation for functional verification Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power Minimum Qualifications Minimum BS and 3+ years of relevant industry experience Experience with microprocessor architecture Experience with logic design principles with timing and power implications Experience in Verilog or VHDL Experience with simulators and waveform debugging process Preferred Qualifications Expertise in one or more of the following areas: out-of-order execution, instruction scheduling, integer and floating point execution, load/store execution, cache and memory subsystems Understanding of low power microarchitecture techniques Understanding of high-performance techniques and trade-offs in a CPU microarchitecture Experience in C or C++ programming Experience using an interpretive language such as Perl or Python At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $147,400 and $272,100, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits. Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program. Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant . #J-18808-Ljbffr Apple Inc.

Vacancy posted 1 day ago
Similar jobs that could be interesting for youBased on the CPU Microarchitect/RTL Engineer - Execution, Load/Store in Santa Clara, CA vacancy
  • A leading tech company in Santa Clara is seeking an experienced CPU Microarchitect/RTL Engineer to drive architecture and RTL development for high-performance microprocessors. Candidates should have a Bachelor's degree and at least 3 years of industry experience. Familiarity... 
    Suggested

    Apple Inc.

    Santa Clara, CA
    4 days ago
  • $126.8k - $190.9k

    Description As a CPU Microarchitect/RTL Engineer, you will participate in the following: Micro-architecture development...  ...scheduling and register renaming, out-of-order execution; integer and floating point execution; load/store execution; cache and memory subsystems;... 
    Suggested
    Relocation

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • $125k - $275k

     ...exceptional architects and engineers to rethink how AI, sensing,...  ...Overview We are looking for a CPU RTL Engineer to help build Velaura...  ..., branch prediction, load/store units, and cache interfaces...  ...prediction, out‑of‑order or in‑order execution tradeoffs, and memory... 
    Suggested
    Flexible hours

    Velaura

    Santa Clara, CA
    5 days ago
  • $126.8k - $190.9k

    A leading technology company is seeking a CPU Microarchitect/RTL Engineer in Santa Clara, CA. This role involves developing micro-architecture, owning RTL design, and supporting verification teams. Candidates should have experience with Verilog or VHDL and a strong background... 
    Suggested

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • $167.1k - $250.7k

    General Summary We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices. In this role, you will...  ...verification support. Help the design verification team execute on the functional verification strategy. Performance verification... 
    Suggested
    Work experience placement
    Work from home

    Qualcomm

    Santa Clara, CA
    5 days ago
  • $142.2k - $213.4k

    Company Qualcomm Technologies, Inc. Job Area Engineering Group > CPU Engineering General Summary We are hiring talented engineers for RISCV CPU RTL development targeting high-performance,...  ...for microarchitecture and RTL execution of CPU system features. These include,... 
    Work from home

    Qualcomm

    Santa Clara, CA
    5 days ago
  • $167.1k - $250.7k

     ...are seeking a post‑silicon CPU RAS engineer focused on Silent Data Corruption...  ...Engineering, architecture, RTL, firmware, and post‑silicon...  ...in: CPU pipelines, load/store, atomics, coherency, and cache...  ...correctness oracles (redundant execution, invariants, checksums) to catch... 
    Work experience placement
    Work from home

    Qualcomm

    Santa Clara, CA
    5 days ago
  • $167.1k - $250.7k

    Qualcomm is hiring talented engineers for CPU RTL development in Santa Clara, California. In this role, you will work with chip architects to define micro-architecture and assist in product life cycle management. The ideal candidate will have an MS degree in Computer or... 

    Qualcomm

    Santa Clara, CA
    5 days ago
  • $100k

     ...have developed a high performance RISC‑V CPU from scratch, and share a passion for AI and...  .... We are looking for a talented engineer to join our CPU design team to iterate through...  ...on RISC‑V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional... 
    Permanent employment

    Tenstorrent Inc.

    Santa Clara, CA
    1 day ago
  • $198.7k - $298.1k

    Company: Qualcomm Technologies, Inc. Job Area: Engineering Group, Engineering Group > CPU Engineering We are seeking a highly skilled and versatile engineer who thrives at the intersection of RTL design and CAD automation. This role is ideal for someone who understands... 
    Work experience placement
    Work from home

    Qualcomm

    Santa Clara, CA
    4 days ago
  • $181.1k - $318.4k

    A leading tech company in Santa Clara seeks an experienced engineer to drive CPU cache subsystem architecture and RTL development. The ideal candidate should have a Bachelor's degree and over 10 years of experience in microprocessor architecture, with skills in Verilog... 

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • Velaura in Santa Clara is seeking a CPU RTL Engineer to design RTL for their next-generation Physical AI SoC. The role involves optimizing CPU cores and collaborating with various engineering teams to bring innovative concepts to production silicon. Ideal candidates will... 

    Velaura

    Santa Clara, CA
    4 days ago
  • A technology corporation is seeking a skilled engineer to enhance CPU design and develop automation solutions. The ideal candidate will have extensive experience in RTL design and CPU microarchitecture, coupled with advanced skills in scripting, particularly in Python.... 

    Qualcomm

    Santa Clara, CA
    4 days ago
  •  ...Qualcomm Technologies, Inc. Job Area Engineering Group, Engineering Group > CPU Engineering General Summary As...  ..., branch prediction, renaming, execute units, SIMD, load/store, MMU, caches, retire, etc....  ...CPU Performance Architecture and RTL team members to identify... 

    Qualcomm

    Cupertino, CA
    1 day ago
  •  ...bugs. You will be developing CPU test content using our test generators...  ...Work closely with CPU RTL and DV teams to understand changes...  ...to our CPU designs and to engineer test content for new CPU features...  ...Drive the bring‑up and execution of our silicon validation tools... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    1 day ago
  • $147.4k - $272.1k

     ...Description Work closely with architecture, RTL designers, and DFT designers on verifying...  ...correctness of the DFT logic Execute test plans for DFT logic Develop testbenches...  ...Preferred Qualifications Understanding of CPU architecture Experience in developing design... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    1 day ago
  • $158.76k - $194.04k

     ...a Power‑Management/Reset/Clock Micro‑Architect and RTL Design Engineer to design industry‑leading CPU and interconnect IP, enabling rapid adoption of RISC...  ...work with the design verification team to create and execute thorough verification test plans. Collaborate with the... 
    Flexible hours

    SiFive, Inc.

    Santa Clara, CA
    3 days ago
  • $158.76k - $194.04k

     ...SiFive is looking for hardware engineers who are passionate about designing industry‑leading CPU and interconnect IP to help drive...  ...Reset/Clock Micro‑Architect and RTL Design Engineer you will be part...  ...verification team to create and execute thorough verification test plans... 

    SiFive

    Santa Clara, CA
    5 days ago
  • $147.4k - $272.1k

     ...Control verification. Description As a CPU Processor Power Management Verification Engineer, you will have the...  ...Work closely with architecture and RTL designers on verifying the functionality...  ...Clock Control logic Develop and execute test plans and schedules for the power... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    1 day ago
  • $70 - $100 per hour

     ...Santa Clara, United States Sector: Engineering Salary: $70.00 to $100.00 per...  ...Design Verification Engineer - CPU Subsystem Looking for a Design...  ...verification environments, executing test plans, & driving functional verification at the RTL level. The ideal person would have... 
    Hourly pay
    Night shift

    Yoh, A Day & Zimmermann Company

    Santa Clara, CA
    5 days ago
  •  ...to help deliver the next groundbreaking Apple product! As a CPU CDC/RDC/STA Engineer, you will play a major role analyzing the design and driving...  ...maintaining the CDC and RDC sign-offs for CPU designs Working with RTL and DV teams to recommend System Verilog assertions needed... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    2 days ago
  •  ...leading technology company in Santa Clara, California is seeking a CPU CDC/STA Engineer to enhance and maintain design methodologies for CPUs. You will be responsible for CDC and RDC sign-offs, work with RTL and DV teams on assertions, and debug vendor tool issues. The... 

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • $181.1k - $318.4k

     ...leading tech company in Santa Clara is seeking an experienced CPU Logic Equivalence Check Engineer to own the logic equivalence check for high-performance...  ...and 10+ years of industry experience, particularly with RTL-to-gate verification tools. Candidates should have... 

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • $126.8k - $190.9k

     ...deliver groundbreaking Apple products!Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation. Description As a CPU...  ..., performance, and area (PPA) trade-offs Drive RTL-to-GDS design convergence through... 
    Relocation

    Apple

    Santa Clara, CA
    3 days ago
  •  ...leading technology company in Santa Clara is looking for a CPU CDC/RDC/STA Engineer to develop and maintain sign-offs for CPU designs. The ideal...  ...tools like Synopsys or Real Intent. You'll collaborate with RTL and Verification teams, improving designs and resolving tool... 

    Apple Inc.

    Santa Clara, CA
    2 days ago
  • $126.8k - $190.9k

     ...us to help deliver the next groundbreaking Apple product!As a CPU CDC/STA Engineer, you will play a major role analyzing the design and driving...  ...maintaining the CDC and RDC sign-offs for CPU designs Working with RTL and DV teams to recommend System Verilog assertions needed to... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    3 days ago
  • $181.1k - $318.4k

    CPU Logic Equivalence Check (LEC) Engineer Santa Clara, California, United States Hardware Imagine what you could do here. At Apple, new ideas have a way...  ...Experience with at least one of the following RTL-to-gate formal verification tools (LEC): Conformal or Formality... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    3 days ago
  • $200k

     ...assembling a team of exceptional architects and engineers to rethink how AI, sensing, memory, and...  ...Overview We are looking for a Senior RTL Engineer to help build Velaura’s next-...  ...software teams to define hardware interfaces, execution flows, memory hierarchies, and... 
    Flexible hours
    Night shift

    Velaura

    Santa Clara, CA
    5 days ago
  • $181.1k - $318.4k

     ...Apple products! We are looking for a strong candidate to join our CPU team focusing on power budgeting, analysis, and identification of...  ...opportunities at the cross-section of micro-architecture, RTL, physical design, and technology in high performance designs. Description... 
    Relocation

    Apple Inc.

    Santa Clara, CA
    3 days ago
  • $158.76k - $194.04k

    SiFive in Santa Clara, CA is seeking a Power-Management/Reset/Clock Micro-Architect and RTL Design Engineer to design industry-leading CPU and interconnect IP. This role involves collaborating with various teams to architect solutions for power management and clocking,... 

    SiFive

    Santa Clara, CA
    1 day ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to CPU Microarchitect/RTL Engineer - Execution, Load/Store. Be the first to apply!