Principal FPGA Engineer I

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State. At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands‑on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward‑thinking individuals to join our team. We are looking to add a Principal FPGA Engineer I to our team. If you enjoy working in a startup environment, and are passionate about developing leading‑edge hardware for satellites, spacecraft, and aerospace systems, we would like to hear from you. In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high‑speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board‑level hardware design is also helpful in the role. As a principal level employee, you will present engineering design review materials to our customers and executive team, as well as participate in proposal‑writing efforts. As such, excellent written and verbal communication skills are required.

JOB DUTIES AND RESPONSIBILITIES

Lead FPGA design and verification efforts for space‑based programs ensuring compliance with industry standards and program requirements. Work with cross‑functional teams (system engineering, hardware designers, and software engineers) to define FPGA architecture, partitioning, interface definitions, and specifications. Develop FPGA architecture based on high level system requirements to formulate part selections and SWAP‑C estimates with an emphasis on FPGA utilizations and power consumption. Act as the subject matter expert when participating in design reviews and bringing technical expertise and insight to the team. Mentor and guide junior FPGA designers to drive for efficiency, quality, and consistency. Maintain pulse on emerging technologies to drive future product development for space applications.

JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS

A Bachelor of Science (BS) or Master of Science (MS) degree in Electrical Engineering or Computer Engineering from an accredited university or institution. 9 years of industry or university research experience in the design, analysis, and implementation of FPGA systems at the HDL level. Proficiency in VHDL and/or Verilog design capture. Familiarity with radiation‑tolerant FPGA devices (Xilinx Versal, Xilinx UltraScale+, Xilinx RFSoC, Micorsemi PolarFire, RTG‑4). Expertise in FPGA implementation (synthesis, place and route and timing closure) and verification. Proficient in HDL coder, Modelsim RTL simulation tools, Xilinx and Microsemi tool flows. Strong understanding of space environment considerations and radiation effects on FPGA parts to develop mitigation techniques. Hands‑on experience with lab instruments such as digital oscilloscopes, spectrum analyzers, RF signal generators, and vector signal analyzers. Experience with high‑speed interfaces and power optimization techniques for space applications. Proven track record of successful FPGA designs deployed in space programs. Excellent written and verbal communication skills.

PREFERRED EXPERIENCE

Experience with worst‑case analysis, failure method and criticality analyses, and reliability analysis. Familiarity with digital communications and digital signal processing. Experience with board‑level hardware design. Demonstrated ability to work efficiently with a distributed team. Proficiency with git source code control. Experience developing firmware using agile flows. $165,000 - $199,000 a year CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full‑time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans. CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard torace, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law. #J-18808-Ljbffr Roman Health Pharmacy LLC