Principal RTL Design Engineer - QGOV

Company Qualcomm Technologies, Inc. Job Area Engineering Group > ASICS Engineering General Summary As a Design Engineer, you’ll play a critical role in shaping cutting‑edge digital designs. Responsibilities Micro-Architecture: Designing micro-architecture for both simple and complex digital interface blocks. RTL Development: Developing RTL code using industry best practices, handling multi-clock designs, high-frequency requirements, low power, and low latency, and ensuring high performance. Debugging and Post-Silicon Bring‑Up: Troubleshooting and debugging issues during development and supporting post‑silicon bring‑up activities. Documentation: Creating comprehensive design documentation to ensure clarity and maintainability. Design Optimization: Optimizing designs for key metrics such as area, power, and performance. Cross-Functional Collaboration: Collaborating with cross-functional teams, including DFT, Implementation, Verification, Emulation, and Firmware teams. Qualifications 10+ years of work experience with RTL/FPGA design (Verilog, SystemVerilog), embedded system architecture and verification. Bachelor’s degree in computer science, electrical/electronics engineering, engineering, or related field AND 10+ years of hardware engineering or related experience. Master’s degree in computer science, electrical/electronics engineering, engineering, or related field AND 10+ years of hardware engineering or related experience. Ph.D. in computer science, electrical/electronics engineering, engineering, or related field AND at least 6+ years of ASIC design, verification, validation, integration, or related experience. Must be a U.S. citizen and eligible to receive a U.S. Government security clearance. Must be located in San Diego and work full‑time, 5 days per week. Preferred Qualifications Positive Attitude: Bring a fun-loving attitude and a passion for inclusively solving problems. 10+ years of ASIC design experience. System Verilog Design, linting, CDC, synthesis (FPGA and ASIC). Building test suites for design validation. Understanding of emulation and prototyping flows for design and validation in lab. Experience with designing complex digital logic blocks and subsystems (CPU, GPU, DSP, always‑on systems, digital interfaces such as PCIe, UART, I2C, DDRx, SPI, USB). Knowledge of ISAs such as ARM THUMB or RISC‑V. Understanding of processor or microcontroller system design. Experience with multi‑power domain and multi‑clock domain designs. Proficiency in scripting or automation languages such as Python or Perl. Familiarity with state‑of‑the‑art industry‑standard digital design tools. Awareness of challenges of working with lower node technologies. Benefits Pay range: $192,000.00 - $288,000.00. Additionally, the position offers a competitive annual discretionary bonus program, opportunity for annual RSU grants, and a comprehensive benefits package. Equal Opportunity Employer Qualcomm is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. #J-18808-Ljbffr Qualcomm