Senior Director, AI Interface Architecture

Description

We are seeking a Senior Director AI Interface Architecture to solve the system-level interconnection challenges that connect XPUs (NPU/GPU/custom silicon) into working AI infrastructure. This role owns how compute elements are wired networked and orchestrated together at node rack and cluster scale so that large-scale LLM training and inference run efficiently across the platform.

Base salary range is $230000 - $315000 a year. The base salary offer will depend on factors such as education experience training skills qualifications and location. This position is also eligible for a discretionary bonus equity and a full range of medical and other benefits.

Why Credo

• Purpose: We invest in what matters. From meaningful-future shaping projects to competitive compensation we empower you to grow your career while making a lasting impact.
• People: Connection starts within. We collaborate celebrate wins and create an environment where everyone can do their best work.
• Possibilities: Our belief shapes whats next. Our technology powers the most reliable and energy-efficient connections around the world and our team powers new products and markets that come next.

Requirements

Basic Qualifications

• 15 years in systems/interconnect architecture or AI/HPC infrastructure including 5 years in a technical leadership role.
• Solid understanding of NPU GPU and CPU architectures
• Strong grasp of DP TP PP EP and hybrid parallelism strategies and how they drive interconnect and communication patterns.
• Familiarity with leading open LLM architectures (e.g. Kimi Llama DeepSeek Mixtral Qwen) and their impact on system-level communication.
• Experience solving rack- node- and cluster-scale interconnection and workload-partitioning problems.
• Understanding of LLM deployment methods across training and inference from a networking/system-integration perspective.
• Strong cross-functional leadership and communication skills.
• Bachelors degree in Computer Engineering EE CS or related field required; Masters or PhD preferred.

Preferred Qualifications

• Experience at a silicon vendor or hyperscaler solving system/network integration for accelerator hardware at scale.
• Contributions to open-source AI infrastructure projects (Megatron-LM DeepSpeed vLLM SGLang).
• Experience with next-gen interconnect standards (UALink UEC).

Required Experience:

Exec