Senior FPGA Design Engineer

Title: FPGA Design Engineer Location: San Diego (Onsite) Term: Contract/Perm Duration: Long Term/Perm Start:ASAP Required: Active Clearance 10+ years experience FPGA Design Engineer, .Strong VHDL Skills, SystemVerilog Deep experience with Bring-Up, Experience in Cryptography is preferred. Good experience with Packet handling and External digital interfaces Required. Experience with Microchip FPGAs a Plus Active Government Clearance Required Onsite Full-Time Required A2e Technologies is an equal opportunity employer and federal contractor. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, sexual orientation, and gender identity), national origin, disability, protected veteran status, or any other characteristic protected by applicable law. If you are a qualified individual with a disability or a protected veteran and need a reasonable accommodation to complete any part of the application process, please contact View email address on click.appcast.io. #J-18808-Ljbffr