Senior ASIC Designer — AI/Data Center Memory Acceleration
Netpreme
Netpreme is seeking an experienced Senior ASIC Designer to lead RTL design of IPs, subsystems, and SOCs for memory acceleration in AI/data-center contexts. You will drive microarchitecture specs, reviews, and cross‑functional collaboration across architecture, verification, physical design, firmware, and DFT. The role requires 5+ years in ASIC/SOC design, strong leadership, and deep RTL expertise. Offices in Boston and Santa Clara support on-site work with relocation options. #J-18808-Ljbffr Netpreme
Vacancy posted 3 days ago
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