SMTS Analog Design Engineer, Mixed-Signal PHY (Clocking & High-Speed I/O)

Responsibilities Own the design of one or more custom analog blocks from specification through schematic, simulation, and layout review. Primary focus is on clocking (PLL, DLL, CDR), with transmitter/receiver circuits as valued secondary experience. Contribute to top‑level PHY analog architecture decisions, including clocking topology, signal‑chain partitioning, power‑domain strategy, and performance/area/power trade‑offs. Develop and maintain transistor‑level simulation testbenches; execute corner, Monte‑Carlo, and mismatch analysis to characterize design margin and yield sensitivity. Define clean interface specifications between custom analog blocks and the digital control wrapper – signal naming, timing contracts, and boundary‑constraint documentation in coordination with the Chip Lead. Collaborate closely with the layout team to review and guide custom analog layout, focusing on matching, shielding, guard ring, and parasitic sensitivity for high‑speed circuits. Support post‑silicon characterization in the lab – correlate measured results to simulation, identify root causes of performance delta, and extract maximum learning from each hardware run. Author block‑level specifications, simulation summary reports, and interface control documents that serve as the authoritative reference for the team and for follow‑on program development. Basic Qualifications BS, MS, or PhD in Electrical Engineering or related field (MS/PhD strongly preferred). 10+ years of analog/mixed‑signal IC design experience with at least one tape‑out in a primary circuit ownership role. Deep expertise in clocking circuit design – PLL, DLL, or CDR architecture and transistor‑level implementation in advanced CMOS nodes. Strong transistor‑level simulation skills using HSpice or equivalent; comfort with corner, Monte‑Carlo, and mismatch analysis for yield‑aware design. Solid understanding of jitter analysis – phase noise, period jitter, cycle‑to‑cycle jitter, and their impact on high‑speed link timing margins. Experience defining analog‑digital interfaces in a mixed‑signal environment, including timing contracts, reset/initialization sequencing, and digital control of analog parameters. Ability to work effectively as a peer technical contributor on a small team – comfortable with broad ownership, cross‑discipline collaboration, and making design decisions with real consequences. Strong written communication skills – this role produces specifications and simulation reports, not just schematics. Preferred Qualifications Experience with high‑speed transmitter design – output driver architectures, pre‑emphasis, swing control, and impedance matching for multi‑Gbps die‑to‑die or SerDes interfaces. Experience with high‑speed receiver design – sense amplifiers, CTLE/DFE equalization, sampler design, and threshold calibration. Familiarity with die‑to‑die or chip‑to‑chip PHY architectures – UCIe, AIB, BoW, or proprietary short‑reach interconnect standards. Experience with OTP/fuse‑based calibration architectures and analog trim loop implementation. Familiarity with real‑number modeling (RNM) or Verilog‑AMS behavioral modeling for use in mixed‑signal simulation environments. Post‑silicon characterization experience – correlating simulation results to measured eye diagrams, BER curves, phase noise plots, and jitter histograms on real hardware. Prior experience in a small team or pathfinding environment where the analog architecture is not handed down but actively developed. Compensation US base salary range that Micron Technology estimates could be paid for this full‑time position is: $159,000.00 – $347,000.00 a year. Additional compensation may include benefits, bonuses and equity. Benefits Micron benefits are designed to help you stay well, provide peace of mind, and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time‑off program and paid holidays. Equal Opportunity Micron is proud to be an equal‑opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws. Other Policies Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards. #J-18808-Ljbffr Micron Technology, Inc.