Integration Engineer or Senior Integration Engineer, Texas Institute for Electronics

Integration Engineer Or Senior Integration Engineer, Texas Institute For Electronics

The Integration Engineer or Senior Integration Engineer will focus on processing of test and demonstration vehicles in advanced Heterogeneous Integration projects. This role will initially involve toolset installation/qualification and evolve into establishing best known method (BKM) flows, characterizing performance and executing improvements to enhance yield and reliability.

Responsibilities include:

• Drive unit process engineers and tool / material vendors towards achieving defined targets for integrated test vehicles.
• Develop successful shortloop and full integrated processes to demonstrate various heterogeneous integration prototypes.
• Significant hands-on role within the cleanroom is expected, initially with shared ownership of critical unit processes.
• Define process window and resolve excursion through structured troubleshooting and investigation of failure modes.
• Design and evaluate results of experiments on test vehicles for mechanical / electrical performance and reliability.
• Able to work in a team environment, mentor junior engineers / students and communicate effectively.

Required Qualifications

For Integration Engineer:

• Bachelor's degree in semiconductor engineering fields such as Electrical Engineering, Chemical Engineering, Materials Science or other relevant disciplines.
• Five years of relevant experience to include experience with Cu BEOL interconnects, including hands on experience with copper DD unit processes.
• Experience in W2W or D2WHB extremely preferred.

For Senior Integration Engineer:

• Master's degree or Doctoral degree in semiconductor engineering fields such as Electrical Engineering, Chemical Engineering, Materials Science or other relevant disciplines
• 3 years of experience in semiconductor process engineering.
• Experience in W2W or D2WHB extremely preferred.

And:

• Working knowledge or experience with 3D ICs including various integration schemes.
• Extensive familiarity with standard inline metrology and failure analysis techniques.
• Experience with working on test vehicles to establish baseline processes.
• Ability to work in a cleanroom for extended periods of time to inspect, oversee and debug processes. This includes the ability to gown to applicable clean room standards.
• Experience with analysis and interpretation of BEOL parametric etest and reliability.
• Strong data analytical skills (JMP, Python etc.) and communication skills.

Relevant education and experience may be substituted as appropriate.

Preferred Qualifications

• 3 or more years of experience with unit processes in Copper CMP, particle free wet cleans or bonding.
• 10 or more years of experience in semiconductor process engineering.
• Experience in a startup or research and development (R&D) environment
• Experience with advanced technology nodes.
• Experience in test vehicle design, layout, and/or extraction of parametric results.

Salary Range

TIE Pays Industry Competitive Salaries

Working Conditions

• Work is performed on-site in a scientific research environment, with dynamic work conditions and frequent interruptions.
• Work is performed in a cleanroom environment, requiring the ability to gown to ISO Class 5 Clean Room standards.
• Work outside standard office hours could be required on an occasional basis during peak periods and special events.

Required Materials

• Resume/CV
• 3 work references with their contact information; at least one reference should be from a supervisor
• Letter of interest