Senior Firmware/Hardware Electronic Design Engineer
UrsaNav
We are seeking a Senior Electronic Design Engineer with 3 or more years of experience in the development of FPGA based solutions to work on our precision timing control hardware and software for UrsaNav’s PNT systems. The ideal candidate will have experience using the Xilinx Spartan 6 or Artix-7 family, as well as a strong knowledge of the Vivado ML toolset. The position is based in our Billerica MA office with the option for a hybrid schedule when applicable and will report into the Engineering and Manufacturing organization. Day to day responsibilities will include working as part of our research and development team to implement proprietary algorithms and control schemes in our sub-system components, as well innovate around our current products to improve performance and reliability. Additional duties will include working with the field service team to resolve issues and implement new features, supporting test engineering as needed to help develop production test and working with software development engineers. Key Requirements: Experience of the Xilinx Vivado ML Toolset and/or ISE. Strong knowledge of Xilinx FPGA, Spartan-6 or Artix-7 Family. Minimum 2 years’ experience in writing VHDL for FPGA s and C/C++ for ARM/DSP SoCs. Ability to integrate, test and debug firmware. Experience developing hardware/FPGA architectures. Good working knowledge of MATLAB is a plus. General understanding of RF receivers and transmitters. Familiarity with common laboratory instruments including spectrum analyzers, signal generators, oscilloscopes etc. Be a self-starter with excellent problem-solving skills as well as being able to work independently. BS in Computer Science, Electrical Engineering, or Computer Engineering with 3+ years’ experience / MS with 2+ years’ experience. Familiarity with position, navigation and timing or GPS, as well as, Altium for schematic/layout tasks is a plus. Please submit your resume and your expression of interest to apply for this position. #J-18808-Ljbffr UrsaNav
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