Senior SerDes Software Engineer — 224G PAM4 & PCIe Bring‑Up
Eridu AI
Eridu AI in Silicon Valley seeks a senior SerDes software engineer to lead development, bring-up, validation, and optimization of 224 Gb/s-per-lane interfaces. You will work on Ethernet SerDes, PCIe, and UCIe in advanced silicon with cross-functional teams. This senior role requires deep knowledge of SerDes architecture, PHY init, link training, equalization, calibration, and system SI. Collaboration with analog, ASIC, firmware, and validation engineers is essential. #J-18808-Ljbffr Eridu AI
Vacancy posted 1 day ago
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