Sr. Principal AMS Verification Engineer

If you are looking for a challenging and exciting career in the world of technology, then look no further. Skyworks is an innovator of high-performance analog semiconductors whose solutions are powering the wireless networking revolution. Through our broad technology expertise and one of the most extensive product portfolios in the industry, we are Connecting Everyone and Everything, All the Time.

At Skyworks, you will find a fast-paced environment with a strong focus on global collaboration, minimal layers of management, and the freedom to make meaningful contributions in a setting that encourages creative thinking. We are excited about the opportunity to work with you and glad you want to be part of a team of talented individuals who together are changing the way the world communicates.

Requisition ID: 77805 

Description

Skyworks Solutions is seeking an accomplished Senior Principal Engineer to join our Analog/Mixed-Signal (AMS) Verification team. In this role, you will play a critical part in developing and advancing industry-leading AMS verification methodologies, defining scalable workflows, and selecting best-in-class tools to enable zero-defect product development while meeting competitive project schedules.

The successful candidate will perform hands-on verification of complex mixed-signal blocks, including data converters (DAC, ADC), power-on-reset circuits (POR), low-dropout regulators (LDOs), oscillators, state machines, and digital interfaces. You will derive comprehensive verification and test plans directly from product and system requirements, working closely with design teams to build deep design understanding and provide clear, actionable feedback on functionality, performance, and coverage.

This position requires a strong background in analog or mixed-signal design and/or verification, with demonstrated expertise in simulation and verification environments such as Cadence. Verification will leverage both traditional analog/mixed-signal (AMS) techniques and event-driven digital mixed-signal (DMS) methodologies. Accordingly, experience developing SystemVerilog testbenches and creating analog behavioral models using Verilog-A and SystemVerilog Real Number Modeling (RNM) is highly desirable.

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Responsibilities

Your key responsibilities will include but not be limited to:

• Perform end-to-end analog/mixed-signal verification of RF Front End Modules (FEM), from block-level through full-chip integration, leveraging schematic, behavioral, and functional views to achieve comprehensive coverage while meeting project schedules.
• Develop Verilog-A and SystemVerilog RNM behavioral models for analog and mixed-signal circuits. Perform equivalence checks to validate behavioral models match circuits.
• Define and execute verification plans derived directly from product specifications.
• Partner closely with design teams to develop deep understanding of custom circuits, providing verification feedback on functionality and performance.
• Recommend test hooks to strengthen verification and improve Design for Test (DFT).
• Review layout and floorplans to proactively identify and resolve issues.
• Continuously improve verification methodologies with an emphasis on scalability, reusability, and portability across programs.
• Own mixed-signal verification sign-off in preparation for tapeout.
• Optimize models to ensure accuracy while maintaining efficient simulation performance.
• Document modeling and verification methodologies, and promote best practices across teams and programs.
• Stay current with industry trends and emerging techniques in analog and mixed-signal modeling and verification.

Required Experience and Skills

• Requires a BS and 15 years of experience (or MS and 12 yrs or PhD and 8 yrs)
• Strong leaderships skills and ability to drive action across the organization.
• Experience with Analog/Mixed-Signal circuits, including LDOs, PORs, ADCs, Voltage-Current references and oscillators. Knowledge of RF design (LNA, PA, and Switches) is desirable.
• Knowledge of behavioral modeling of analog circuits including Verilog-A and SystemVerilog RNM.
• Experience with analog layout and knowledge of best practices for isolation, matching, noise avoidance and reliability.
• Experience with EDA tools, such as Cadence Virtuoso and ADS.
• Basic scripting language skills, such as Python, is a plus.
• Excellent communications skills with the ability to work and thrive in a team environment.

The typical base pay range for this role across the U.S. is currently USD $143,000 - $286,400 per year. Starting base pay will depend on relevant experience and skills, training and education, business needs, market demands, the ultimate job duties and requirements, and work location. Skyworks has different base pay ranges for different work locations in the U.S. Benefits include access to healthcare benefits (including a premium-free medical plan option), a 401(k) plan and company match, an employee stock purchase plan, paid time off (including vacation, sick/wellness, parental leave), among others. Employees are eligible to participate in an incentive plan, and certain roles are also eligible for additional awards, including recognition and stock. These incentives and awards are based on individual and/or company performance. 

Skyworks is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, age, sex, sexual orientation, gender identity, national origin, disability, protected veteran status, or any other characteristic protected by law. Skyworks strives to create an accessible workplace; if you need an accommodation due to a disability, please contact us at View email address on us.fitly.work.