Founding Member, Design Verification for AI-Driven ASICs
Architect Labs
Architect Labs in Palo Alto seeks a Founding Member of the Technical Staff for Design Verification to own verification strategy for AI-driven designs taping out on leading foundries. You will work at the intersection of rigorous hardware verification and AI-driven design automation. Collaborate with architecture, design, and AI/ML teams to define DV flows, build checkers, monitors, and cross-IP validation. Deep expertise in SystemVerilog, UVM, C/C++, and tapeout experience at frontier AI chip #J-18808-Ljbffr Architect Labs
Vacancy posted 2 days ago
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