Principal BMC Firmware Design Engineer

Graphcore is a globally recognized leader in Artificial Intelligence computing systems.The company designs advanced semiconductors and data center hardware that provide the specialized processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening anew AI Engineering Campus in Austin, which will play a central role in Graphcore's work building the future of AI computing. We are looking for a Senior Firmware Design Engineer to lead and drive the development of OpenBMC based management firmware across server and rack-scale platforms, primarily targeted for hyperscale data center environments. This role requires expertise in BMC, strong experience with CI/CD development workflows, and a proven track record of collaborating with ODM design partners to deliver high-quality, scalable firmware solutions. You will play a critical role in shaping the architecture, roadmap, and execution of next-generation platform management firmware.

RESPONSIBILITIES

Architecture, design, development, and deployment of OpenBMC-based firmware for hyperscale rack management platforms. Define and drive BMC feature development to meet hyperscaler requirements for reliability, scale, serviceability, and automation. Collaborate closely with ODM partners through all phases of the design and development lifecycle — from concept to mass production — ensuring timely and high-quality firmware deliverables. Guide and support integration of BMC firmware into CI/CD pipelines, including automated builds, regression testing, static analysis, and deployment workflows. Design and implement robust and scalable firmware interfaces for platform telemetry, power/thermal controls, remote manageability (IPMI/Redfish/PMCI), and firmware update infrastructure. Partner with hardware, BIOS, security, systems, and validation teams to drive alignment across the entire platform stack. Debug complex hardware/firmware/system issues in lab and production environments.

REQUIREMENTS

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline. 5+ years of hands‑on experience in BMC or similar firmware development. Strong expertise with Yocto-based Linux systems, and embedded software design. Experience delivering firmware solutions in hyperscale environments (e.g., cloud service providers, large‑scale data center infrastructure). Proficiency in C/C++, Linux kernel and userspace development, and scripting languages (Python, Bash).Deep knowledge of platform management protocols: IPMI, DCMI, DMTF standards such as Redfish and PMCI, SSH, VNC, SNMP). Solid understanding of server and rack‑level hardware architecture (e.g., power delivery, thermal control, FRUs, sensors). Experience with BMC architecture and hardware interfaces: OCP DC‑SCM and HPM, NC‑SI, MCTP, PLDM, PCIe, I3C/I2C, SPI, USB, SGPIO, UART. Proven experience building and maintaining CI/CD pipelines (e.g., Jenkins, GitLab CI, GitHub Actions) for firmware development and validation. Experience with code static analysis tools and vulnerability scanners. Experience with system‑level debug tools such as logic analyzers, JTAG, GDB, strace, and valgrind. Extensive experience working with and managing ODM/JDM partners, including technical leadership, reviews, and issue triage.

DIFFERENTIATORS

Experience with OpenBMC. Familiarity with firmware security technologies (secure boot, measured boot, signed images, TPM integration). Exposure to server platform architecture (x86/ARM), PCIe, BMC SoCs, and associated peripherals. Experience with DevOps or cloud-native workflows is a plus. #J-18808-Ljbffr EngineersOfAI