Senior CPU RTL Design Engineer - Hybrid Impact

Intel Corporation in Austin, TX, seeks a CPU Logic Design Engineer to drive RTL design, simulation, and optimization for next‑gen processors. You will help define architecture features and ensure timing, power, and area goals are met across the CPU block. The role requires strong SystemVerilog RTL, simulation, and debugging skills, with 3+ years scripting (Python/TCL/Perl). A hybrid work model and collaboration across SoC teams are offered. #J-18808-Ljbffr Intel Corporation