Senior ASIC Clocking Architect PPA, Silicon Bringup
NVIDIA
A leading technology company in Santa Clara is looking for an experienced ASIC engineer to join their Clocks team. You will be responsible for architecting clock domains, optimizing power, performance, and area for NVIDIA chips. Ideal candidates have a BS in Electrical Engineering and experience in RTL design and logic optimization. This role offers a competitive salary and an opportunity to work in a collaborative environment. #J-18808-Ljbffr
Vacancy posted 8 hours ago
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