Senior FPGA Design Engineer

Senior Engineer

We are seeking a talented senior engineer to join the digital design team. The successful candidate will contribute to FPGA development including design, synthesis, verification, validation, test & support. Candidate must have experience using high level design, simulation and verification tools and be familiar with process flows supporting design and verification for digital FPGA efforts. Applicant should also be familiar with embedded software development for FPGA SoCs. Preference will be given to candidates with an understanding of hardware security, signal or image processing, filter design and algorithm implementation in hardware. Direct experience with embedded FPGA design is required.

Required Qualifications:

• BSEE with 6 years relevant experience
• Fluent in Verilog/VHDL
• Understanding of networking (specifically Ethernet/IP) layered models and protocols
• Implementation of FPGA functions to accelerate SW (checksum engines, packet parsing, etc.)
• Ability to debug designs simulated in a UVM environment
• Capability to learn Libero tools, PolarFire (SoC) devices, and IP
• Experience with joint design/debug with embedded software
• Experience debugging FPGA fabric designs with embedded processor software on HW
• Capability for evaluating trade space for adding new features to FPGA fabric and/or software (knows strengths of each technology and can optimize based on requirements)
• Experience with design closure including timing, power and area for SWaP constrained designs
• Familiarity with high speed interfaces (PCIe, DDR4, LVDS, etc)
• Experience with Linux and scripting languages
• Strong analysis and problem solving skills

Preferred Qualifications:

• MSEE with 6 years relevant experience
• Experience with Ethernet and IP in HDL designs
• Understanding of higher layer protocols (TCP, UDP, etc)