Package Layout Engineer
$200k - $275kDensityAI
Own the physical layout of the advanced packages our AI accelerator silicon ships in. You'll take multi-die 2.5D and 3D packages from bump map through tapeout release — defining substrate and interposer stackups, planning bump and ball maps against the die floorplan, routing high-density escape and HBM-class channels, and building the power delivery that feeds hundreds of amps into the accelerator. You'll sit between the die and the board, co-designing with physical design on one side and PCB layout on the other, and you'll own the design release our substrate suppliers and OSATs build from. When the package is the thing standing between silicon and a working system, this is the role that closes it. What will you do Own package substrate and interposer layout end to end; stackup definition, bump and ball map planning, RDL and escape routing, and design release to substrate suppliers and OSATs Own die-to-package-to-board co-design, partnering with physical design on bump placement and floorplan and with PCB layout on the package-board interface Close package DRC/LVS and netlist verification against OSAT and substrate vendor design rules, and drive rule negotiation where the design requires it Use and develop AI assisted tool flows to accelerate package layout, routing, and signoff timelines What we're looking for Exceptional abilities in advanced package physical layout: multi-die substrate and interposer routing, high-density escape, power and ground plane design for high-current accelerator rails, and stackup and via structure definition 8+ years of package layout experience on high-performance designs, including 2.5D / 3D and multi-die packages (CoWoS, EMIB, InFO, fan-out, or equivalent interposer technologies) Hands-on with industry-standard package layout tools (Cadence Allegro Package Designer / SiP Layout, Siemens Xpedition Package Designer, or equivalent) and package DRC/LVS flows Demonstrated ability to work closely with architecture, physical design, SI/PI, thermo-mechanical, and OSAT partners to converge and sign off complex package designs Full compensation packages are based on candidate experience and relevant certifications.
$200,000 - $275,000 USD
Compensation Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status. Export Controls Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview. DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request. #J-18808-Ljbffr DensityAI- DensityAI is seeking an experienced package design lead in Mountain View to own the substrate and interposer layout end to end. You will coordinate with architecture, physical design, and OSAT partners to ensure seamless sign-off for high-performance multi-die packages....Suggested
$136k - $212.75k
...solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions!This position will collaborate with Technical...SuggestedFull timeRemote work$200k - $350k
ABOUT THE ROLE Own different aspects of Packaging including Design Layout, SI/PI and Thermo-mechanical aspects. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out. WHAT YOU'LL DO * Own different...SuggestedH1bVisa sponsorshipWork visa$163k - $237k
Develop physical package substrate design of large form-factor package for ML high-performance... ...(SI/PI), thermal, and mechanical engineering teams to refine and optimize product package... ....Experience in chip package substrate layout, design verification, DFM and taping out...SuggestedWorldwide$154.9k - $209.6k
...across various development activities including schematic driven layout and design, p-cell development, PDK management, and physical... ...of compensation may be provided as part of a total compensation package, in addition to comprehensive medical, dental, and vision coverage...SuggestedFlexible hours- ...breakthrough technology takes more than great engineering—it takes a team of exceptional people... ...Corporation is seeking a Senior IC Packaging Engineer to provide technical leadership... ...guide hands-on package design and physical layout, including critical structures for High-...
$119.62k - $179.2k
...lead. Your Team, Your ImpactCelestial AI Systems and Packaging group is hiring a Package Integration Engineer to oversee packaging integration and vendor... ...Understanding of cross-functional packaging areas (floor plan, layout and architecture, process, thermal, mechanical, SI/...Permanent employmentFull timeInternshipWork from home$145k - $255k
...Principal Packaging Design EngineernEye.ai, a well-funded optical switch startup, is poised... ...experienced Principal Packaging Design Engineer to lead the development of our next-generation... ...for mechanical design and packaging layouts.Preferred Skills:Familiarity with...Contract work- ...Packaging EngineerWe are seeking a detail-oriented Packaging Engineer to support regulatory compliance and supplier quality initiatives. This role focuses on designing, testing, and validating product packaging to meet regulatory requirements and global standards while...Work at officeWorldwide
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- ...Computing Group is seeking an experienced and self-motivated package design engineer. As a key member of the Package group, you will work across... ...etc) for various device packaging. Collaborate with PCB Layout Engineers to optimize the package ballmap and chip team to...
$152.5k - $219.2k
...contribute to the development of complex ASIC package designs from early planning and... ...will collaborate across package design, layout, SI/PI, and silicon teams to help deliver... ...industry within a highly collaborative engineering environment.Responsibilities:• Contribute...Full timeTemporary workLocal areaFlexible hours$191.53k - $286.9k
...learn, and lead. Your Team, Your ImpactPhotonic Fabric Systems Packaging design team drives advanced packaging and system validation design... ...for multi-chip SiP packaging.Lead all aspects of package layout based on I/O, SI-PI and form factor requirements, including routing...Permanent employmentFull timeInternshipWork from home- Google Sunnyvale is hiring a Chip Package SI/PI Engineer to advance TPU hardware acceleration. You will verify complex digital designs, focusing on TPU architecture and AI/ML system integration, shaping next‑gen silicon solutions used by millions of users. As part of the...
- Cspeed IO is seeking an experienced Mechanical Engineer to lead structural FEA for optical engine packages. You will predict warpage through assembly stages and assess interconnect stress, dielectric risk, and fatigue life, collaborating with the photonic design team to...
- ...environment Experience interfacing with part suppliers Advanced or extended familiarity with Microsoft Suite Additional hands-on packaging engineering experience (testing, materials, compliance) Description of working tasks: Responsibility for the design and modification...Worldwide
- A technology company in Palo Alto is seeking a skilled packaging engineer to design and modify product-specific packaging for global shipping. This role involves ensuring compliance with regulatory requirements, conducting tests, and interfacing with suppliers. Candidates...
$200k - $275k
Own the thermo-mechanical design of the advanced packages our AI accelerator silicon ships in. A multi-die 2.5D package is a stack of materials that all want to expand at different rates, under a lid, under load, cycling through hundreds of watts — and your job is to make...H1bWork visa- ...existing optics solutions and architectures. The Role This position owns structural finite element analysis for CspeedIO optical engine packages: warpage prediction through the assembly process, stress in bump and interconnect structures, and the lifetime models...
- Google is seeking a Chip Package SI/PI Engineer in Sunnyvale to shape AI/ML hardware acceleration through advanced package technology and silicon interposer concepts. You will drive co-design across chip, package, and system, guiding SI/PI analysis for production-ready...
$105.5k - $213.5k
...Senior PCB Layout Engineer This role has been designed as "Onsite" with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies...Work experience placementWork at office$125.8k - $170.2k
...an experienced Board Validation and Test Engineer to join our test engineering team. This role... ...ICT/FCT failures with schematic intent, layout, and silicon performance.Use advanced... ...provided as part of a total compensation package, in addition to comprehensive medical, dental...Full timeContract workFlexible hours$163k - $237k
Design, deploy, and carry out post-layout low power verification methodologies according to execution schedules and tape-out signoff... ....Minimum qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or...Worldwide$183k - $247.6k
...around the world.As a Senior Digital ATE Test Engineer, you will be a key contributor to the... ...signal integrity, power integrity, and layout best practices for high-speed I/O interfaces... ...position is listed below. Your Amazon package will include sign-on payments and restricted...Permanent employmentLocal areaFlexible hours- ...related compensation & benefits details below Business Function: Packaging Engineering Company Description Sandisk understands how people and... ...reliability, packaging materials, failure analysis, and PCB layout Additional expertise in die attach, wire bonding, wafer thinning...Contract workTemporary workWork experience placementRemote workWorldwideFlexible hoursShift work
$200k - $275k
...and not just in simulation. You'll work at the seam where the package meets the system, partnering with signal and power integrity, packaging... ...assembly release packages Own high-current power delivery layout and large fine-pitch BGA escape for advanced accelerator...Contract workH1bOverseasVisa sponsorshipWork visaFlexible hours- About the job Senior Staff Packaging Engineer We have partnered with a semiconductor manufacturing firm in the San Jose, CA area to provide them... ...Rule Checks for verification of every aspect of the PCB layout a plus. Travel to Asia to attend technology reviews and resolve...Temporary workWork at officeWorldwide
$120k - $275k
...workloads for AGI. MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-... ...and power target definition.Perform RTL, gate-level, and post-layout power analysis across major SoC subsystems.Analyze AI workloads...Full timeWork experience placementLocal areaRemote workMonday to FridayFlexible hours$120k - $275k
What MatX Is BuildingWe are looking for a Power Engineer to join our Hardware System team. The successful candidate will be responsible... ...analysis (Simplis, HSPICE), and CAD tools for schematic entry and layout (Allegro)Demonstrated ability in lab bring-up, debug techniques...Full timeWork experience placementWork at officeLocal areaRemote workMonday to FridayFlexible hours3 days per week- ...life on Mars.SR. SIGNAL AND POWER INTEGRITY ENGINEER - SI/PI, SATELLITES (STARLINK)SpaceX is... ...in the silicon architecture stage, package performance evaluation, stackup material... ...characterization, channel and PDN architecture, and PCB layout oversight. Once hardware is in hand, you...Permanent employmentTemporary workWorldwideWeekend work
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