Distinguished Signal Integrity Engineer

Invent the future with us. Ampere is a semiconductor design company for a new era, leading the future of computing with an innovative approach to CPU design focused on high-performance, energy efficient AI compute. We are part of the Softbank Group, driving sustainable computing for AI, Cloud, and edge applications. Join us at Ampere and work alongside a passionate and growing team. About the role Our Hardware Design Engineering organization is seeking a Distinguished Signal Integrity Engineer to be part of a team implementing high‑performance solutions for high‑bandwidth, connectivity‑intensive multi‑core processor products, requiring co‑design of silicon, package, and PCB. What you’ll achieve Design, simulate, and validate high‑performance interconnect solutions, working with chip, package, and PCB designers to achieve robust signal integrity performance. Develop layout guidelines for package and PCB, and SI/PI documentation for internal and external customers. Support product bring‑up and customer engagements. Drive state‑of‑the‑art signal integrity analysis methodologies. Influence Ampere’s technology roadmap by delivering technical leadership in next‑generation interconnects, advanced packaging, and cross‑functional system co‑design. About you Experience designing high‑performance signal interconnect solutions. Preferred experience with large body‑size electronic packages and high‑performance PCBs. Deep knowledge of transmission line and electromagnetic theory related to signal integrity and power integrity. Good experience with parallel and serial interfaces, especially high‑speed SerDes such as PCI‑gen5/6/7 or USB/USB‑C. Knowledge of simulation methodologies, time domain and statistical, and ability to create and simulate 3‑D models in tools like HFSS, SIWave and PowerSI. Familiarity with link timing budgeting. Expertise in end‑to‑end channel modeling (HFSS/SIWave/PowerSI) and link budget analysis with both time‑domain and statistical simulation. Understanding of behavioral IO models (IBIS, IBIS‑AMI) and equalization techniques (CTLE, DFE, TX equalization). In‑depth knowledge of SerDes TX/RX equalization techniques and modeling in IBIS‑AMI. Understanding of AC/DC power delivery, power integrity analysis, and simultaneous switching noise analysis for memory interfaces. Good understanding of power delivery impact on clocking and IO. Good understanding of stack‑up manufacturing processes and design limitations considering DFM. Strong communication, interpersonal, and collaboration skills. Electrical or Computer Engineering – Bachelor's degree & 15 years of experience, or master’s degree & 12 years, or PhD & 8 years. What we’ll offer We provide a competitive total rewards package that includes base pay, cash long‑term incentives, and comprehensive benefits. The full base pay range for this role is between $279,500 and $419,500, except in the San Francisco Bay Area where the range is between $293,000 and $440,000. Benefit highlights include Premium medical, dental, and vision insurance, income protection, and a 401(k) retirement plan. Unlimited flextime and 10+ paid holidays for a healthy work‑life balance. A variety of healthy snacks, energizing espresso, and refreshing drinks. Equity in the workplace Ampere is an inclusive and equal‑opportunity employer and welcomes applicants from all backgrounds. All qualified applicants will receive consideration for employment without regard to race, color, national origin, citizenship, religion, age, veteran and/or military status, sex, sexual orientation, gender, gender identity, gender expression, physical or mental disability, or any other basis protected by federal, state, or local law. #J-18808-Ljbffr Ampere