Senior Design Verification Engineer (eInfochips Inc)

Senior Design Verification Engineer (eInfochips Inc) Senior Design Verification Engineer What You’ll Be Doing Build scalable verification environments using UVM and SystemVerilog. Create detailed verification plans from architectural specifications. Write, run, and debug constrained‑random and directed tests. Define, measure, and close functional and code coverage metrics. Run gate‑level simulations to verify power‑up and timing states. Develop scripts to automate regression runs and triage failures. What We Are Looking For Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. Strong proficiency in SystemVerilog and scripting (Python, Perl, or Tcl). Hands‑on experience with UVM (Universal Verification Methodology). Experience with Cadence Xcelium preferred; experience with Synopsys VCS or Siemens Questa acceptable. Deep understanding of constrained‑random verification, assertions (SVA), and functional coverage. Knowledge of AMBA protocols (AXI, AHB, APB). Preferred Qualifications Experience with formal verification tools and methodologies. Background in power‑aware verification using UPF/CPF. Experience verifying custom ARM or DSP processor cores. Familiarity with emulation platforms such as Palladium. Experience with MMU, SRAM/memory subsystem verification. DSP verification experience. Modeling using Real Number Models (RNM) or behavioral models. Scope of Work Verification at system/subsystem level, using SV/UVM + C‑based testing, with emulation (Cadence Palladium). New co‑processing subsystem (NPU, MMU, SRAM, AXI). Memory subsystem interactions. DSP/signal processing. Processor‑in‑loop simulation for C‑based test development. Use of emulation platforms (Cadence Palladium or similar). Some modeling using RNM for analog/digital interaction. What’s In It For You Medical, Dental, Vision Insurance 401(k) with matching contributions Short‑Term/Long‑Term Disability Insurance Health Savings Account (HSA)/Health Reimbursement Account (HRA) options Paid Time Off (including sick, holiday, vacation) Tuition Reimbursement Growth Opportunities Work Arrangement Fully OnSite: Must be able to travel to an Arrow Client office location as requested. Location Minneapolis, MN (Preferred) or Phoenix, AZ. Remote work employees may be required to be present at the nearest Arrow office on request. About eInfochips eInfochips, an Arrow company, is a leading global provider of product engineering and semiconductor design services, with a history of over two decades, 500+ products developed, and 40M deployments in 140 countries. We partner with major industry leaders such as Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft, and Google. EEO Statement Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy) #J-18808-Ljbffr