Senior Principal Signal Integrity Engineer

Location: Greater Atlanta Area, Georgia, USA

Employment Type: Full-Time

Permanent Industry: Semiconductor / High-Speed Electronics

About the Opportunity

We are working with an established semiconductor technology company seeking an experienced Senior Principal Signal Integrity Engineer to join its engineering organisation.

This is a senior technical position focused on the development and optimisation of next‑generation high‑speed memory interface technologies. The successful candidate will play a key role in signal integrity (SI), power integrity (PI), advanced packaging and system‑level performance analysis.

Working alongside experienced engineers across multiple disciplines, you will contribute to the design, simulation and validation of high‑performance semiconductor solutions for demanding computing applications.

The position offers significant technical ownership, opportunities to influence product architecture and direct involvement throughout the product development lifecycle.

Key Responsibilities

• Develop and implement signal integrity and power integrity methodologies for advanced semiconductor products and high-speed memory interfaces.
• Lead SI/PI modelling, simulation and analysis activities at the component, package, PCB and system levels.
• Collaborate with IC design, packaging and validation teams to establish electrical specifications and system-level design requirements.
• Analyse high-speed interconnect performance, including signal loss, reflections, crosstalk, jitter and channel characteristics.
• Optimise package and PCB layouts, including routing strategies, power delivery networks, decoupling and BGA assignments.
• Perform system-level simulations to evaluate performance trade-offs and identify opportunities for design improvement.
• Correlate simulation results with laboratory measurements to validate design methodologies and improve modelling accuracy.
• Provide technical guidance to multidisciplinary engineering teams throughout the design and development process.
• Collaborate with external engineering partners and customers to address complex SI/PI challenges.
• Support laboratory characterisation, silicon validation, debugging and hardware bring‑up activities.
• Contribute to the ongoing development of engineering processes, simulation techniques and design best practices.

Required Qualifications & Experience

• Master's degree or PhD in Electrical Engineering or a closely related discipline.
• 10+ years of relevant industry experience, including substantial expertise in signal integrity, power integrity and advanced semiconductor packaging.
• Practical experience with high-speed memory interfaces, particularly DDR4 and/or DDR5.
• Experience modelling and simulating high-speed memory channels and/or SerDes interfaces.
• Strong theoretical understanding of electromagnetic principles, transmission line theory and high-frequency circuit behaviour.
• Knowledge of signal equalisation techniques, including FIR, FFE, DFE and CTLE.
• Experience with package and PCB design methodologies, including SI/PI-driven layout optimisation.
• Ability to interpret and modify package and PCB layouts using Cadence Allegro, APD or comparable design tools.
• Proficiency in circuit and channel simulation using SPICE, Keysight ADS or equivalent software.
• Experience with electromagnetic modelling and analysis tools such as Ansys HFSS, Q3D or PowerSI.
• Extensive experience correlating simulated results with physical measurements using oscilloscopes, TDRs and vector network analysers.
• Understanding of signal degradation mechanisms, including crosstalk, jitter, insertion loss and their impact on bit error rate performance.
• Ability to investigate complex engineering problems and develop practical, technically sound solutions.
• Strong communication skills and experience working with multidisciplinary engineering teams.

Desirable Experience

• Knowledge of server architectures, including CPU-to-memory interfaces and DIMM-based systems.
• Experience with power delivery network analysis and associated simulation tools.
• Familiarity with Cadence Sigrity, RedHawk, Totem, XcitePI or Virtuoso.
• Experience characterising passive components and evaluating high-speed link performance.
• Understanding of high-speed transmitter and receiver circuit architectures.
• Previous involvement in system-level design optimisation for advanced memory technologies.
• Experience providing technical leadership, mentoring engineers or coordinating complex development activities.

Ideal Candidate Profile

We are looking for a technically accomplished engineer who enjoys solving complex challenges in high-speed electronic design.

The ideal candidate will combine deep expertise in SI/PI analysis with practical experience in semiconductor packaging, simulation and laboratory validation.

You should be comfortable working independently, taking ownership of technically demanding projects and collaborating with engineering teams to deliver high-quality results.

Strong analytical capabilities, effective communication and a practical approach to engineering problem-solving will be essential.

Why Consider This Opportunity?

• Contribute to advanced semiconductor and high-speed memory interface development.
• Work on technically challenging SI/PI problems spanning silicon, packaging and system design.
• Take ownership of critical engineering activities and influence technical decisions.
• Collaborate with experienced specialists across multiple engineering disciplines.