CPU Full-chip Physical Integration Engineer

Role Number: 200668110Team: HardwareLocation: BeavertonPosted: 2026-06-12SummaryImagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, hard-working people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products! The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Join us to help deliver groundbreaking Apple products!Apple’s Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level implementation.DescriptionAs a Full Chip Integration Engineer, you will be participating in the physical design, integration, and verification of high performance, low power processor development.• Full chip floorplan, area optimizations, block partitioning and pin placements• Own chip level place and route (PnR), final CPU layout database construction and verification (PDV)• Develop and validate Power Grid, including routability analysis• Drive custom layout integration, block and full-chip level EM/IR, electrical verification/analysis as well as formal verification• Work with the implementation/CAD teams during the entire chip design cycle to drive signoff closure for tapeout• Work with the SOC team to meet IP technical and delivery requirements• Participate in establishing CAD and physical design methodologies and flow development for chip integration and analysis• Scripting to automate tasks and improve debug efficiencyMinimum QualificationsMinimum BS and 10+ years of relevant industry experienceExperience with scripting in Perl or TCLPreferred QualificationsKnowledge of industrial standards and practices in Physical Design, including Floorplanning, Partitioning, Budgeting, Place and Route and Physical VerificationExperience in developing and implementing Power Grid and Clock specificationsSolid knowledge of Low Power Design, Physical Construction, Integration, EMIR (Drop/Noise), SIGEM Analysis, Formal Verification, Physical PDV, DRC/LVS Verification, and DFMSolid understanding of verification tools such as Conformal LP, LEC, RedHawk, CalibreSolid understanding of CMOS circuit design. Layout design background is a plusWorking knowledge of Extraction and STA methodology and toolsWorking knowledge of Computer ArchitectureAbility to work well in a team, being an excellent problem solver, and self motivatedEEO StatementApple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicantAccessibilityAt Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.Learn about accessibility in Apple’s workplaceLearn about reasonable accommodations for job applicantsApplication DeadlineApple accepts applications to this posting on an ongoing basis.