CAD Engineer - Timing for Gate-Level Flows & Methodologies
$150.4k - $277.6kApple
Role Number: 200657612Team: HardwareLocation: Austin; San JosePosted: 2026-04-13SummaryDo you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, youʼll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). Youʼll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means youʼll be responsible for crafting and building the technology that fuels Appleʼs devices. Together, you and your team will enable our customers to do all the things they love with their devices!In this role as a member of the STA CAD team, you will be an integral part of the effort to improve the performance of Apple Silicon. You will be responsible for all aspects of static timing methodologies, addressing timing challenges on advanced tech nodes through the development of flows and methodologies used by all Apple Silicon teams in driving timing analysis and closure for first time right silicon.DescriptionAs a member of our STA CAD team, you will:• Develop, maintain, and enhance existing gate-level STA flows for Apple silicon designs• Work with design teams to understand and debug issues related to constraints, flow scripts, and timing closure• Facilitate and drive STA methodology changes to improve overall STA flows as it relates to efficiency/productivity and silicon timing correlation• Develop and maintain scripts and methods for timing analysis and power reduction• Develop and support methodologies, tools, and flows used in the verification of timing constraints, drive best practices across design teams• Analysis of timing paths to identify key issues, including post-silicon timing debug• Work closely with EDA vendors to develop and incorporate new capabilities to solve technical problemsMinimum QualificationsMinimum requirement of BS and 3 years of relevant industry experience.Preferred QualificationsExperience with static timing analysis tools and flowsUnderstanding of programming fundamentals and concepts. Familiarity with Python and Tcl or other high level programming languagesFamiliar with STA of large high-performance SoC designs in deep sub-micron technologiesUnderstanding of fundamentals in noise, cross-talk, variation and timing marginsKnowledge of timing/SDC constraints, hands on experience in creation/validation a plusGood communicator who can accurately assess and describe issues to management as well as follow solutions through to completionPay & BenefitsAt Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $150,400 and $277,600, and your base pay will depend on your skills, qualifications, experience, and location.Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple BenefitsNote: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.EEO StatementApple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicantEEO StatementApple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicantAccessibilityAt Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.Learn about accessibility in Apple’s workplaceLearn about reasonable accommodations for job applicantsAccessibilityAt Apple, we believe accessibility is a fundamental human right. You’ll find that idea reflected in everything here — in our culture, our benefits and our digital tools. By welcoming as many perspectives as possible, we help you build a career where you feel like you belong.Learn about accessibility in Apple’s workplaceLearn about reasonable accommodations for job applicantsApplication DeadlineApple accepts applications to this posting on an ongoing basis.Application DeadlineApple accepts applications to this posting on an ongoing basis.
$150.4k - $277.6k
...member of our best-in-class CAD Group, you will be part of... ...band (SEB), failure in time (FIT), self-heating effect... ...develop, define, and refine the methodologies and flows for gate-level as well as transistor-... ...of the world's leading engineers, and help us deliver the next...SuggestedRelocation- ...early to mid-career engineer to advance EM/SEB/... ...methods for gate- and transistor-level designs in our CAD group. You will join... ...team building robust flows and verification... ...Physical Design, Timing, Circuit Design, and... ...while improving CAD methodologies and automation. #J...Suggested
- ...member of our best-in-class CAD Group, you will be part of... ...will leverage your strong engineering fundamentals in electrical... ...(SEB), Failure In Time (FIT), Self-Heating Effect... ...maintaining, and refining methodologies and flows for gate-level as well as transistor-level...SuggestedInternship
$150.4k - $277.6k
...of our best-in-class CAD Group, you will be part... ...grid extraction, STA timing, signal/power EM analysis... ...analysis and signoff flows.Support and... ...flow or TFM (Tool Flow Methodology)Proficiency with UNIX... ...flowExperience in electrical engineering machine learning applicationsExperience...SuggestedRelocation$184.7k - $324.8k
...right requires rigorous transistor-level timing verification and formal... ...every step. Our Custom Timing CAD team builds and owns the flows, tools, and methodologies that make that verification possible... ...are looking for an entry-level engineer who is eager to learn, technically...SuggestedRelocation$150.4k - $277.6k
...it.As a key member of our best-in-class CAD Group, you will be part of building... ...analysis to define, develop and refine the methodologies and flows.DescriptionIn this highly visible role,... ...will include- Supporting transistor level simulation solutions that scale with accuracy...Relocation$142.3k - $263.3k
...it.As a key member of our best-in-class CAD Group, you will be part of building... ...analysis to define, develop and refine the methodologies and flows.DescriptionIn this highly visible role,... ...will include• Supporting transistor level power/signal EM and/or IR solutions that...Relocation- ...Director, Digital Design Methodology & Flow Architecture will... ...synthesis, place and route, timing/power closure, static... ...with design, CAD/methodology, foundry,... ...LevelEducation: B.S. in Electrical Engineering, Computer Engineering,... ...S. or Ph.D. preferred.Level: Director of...Full timeWork at officeLocal area
$168k - $264.5k
...a physical design engineer to be a part of NVIDIA... ...design (PD) methodology team driving innovation... ...shortest possible time. Your work in physical... ...EDA tools, and PD flows through collaboration... .../ML approaches to CAD to improve design... ...- 264,500 USD for Level 4, and 196,000 USD...Full timeRemote work$184.7k - $324.8k
...of the Hardware Technology CAD team, you’ll help design our... ...SOC designs by developing flows, tools and methodologies for future Apple products!... ...are looking for passionate engineers to join our team. In this role... ...extraction, IR and static timing analysis (STA).- Working...Relocation$150.4k - $277.6k
...of the Hardware Technology CAD team, you’ll help design our... ...SOC designs by developing flows, tools and methodologies for future Apple products!... ...are looking for passionate engineers to join our team. In this role... ...extraction, IR and static timing analysis (STA).- Working...Relocation$168k - $264.5k
...innovative physical design methodologies for implementation... ...physical design flow on advanced... .../ML approaches to CAD to improve design... ...performance and turnaround time, while improving... ...or Computer Engineering (or equivalent experience... ...- 264,500 USD for Level 4, and 196,000 USD...$184.7k - $277.6k
....DescriptionAs a Signoff Engineer, you’ll ensure that all necessary... ...on our advanced Signoff CAD team, you’ll work on... ..., and refine signoff methodologies at both the gate and transistor level. This includes, but isn’t... ...accelerate analysis, automate flow debugging, and surface...Relocation$184.7k - $324.8k
...the Hardware Technology CAD team, you'll help bring AI methodology to chip design. You will... ...with design teams and CAD flow owners on complex design... ...verification, physical design, timing, extraction and signoff.... ...for a VLSI design or CAD engineer who is passionate about...Relocation- ...Software - Hardware /Full Time /HybridFor over four... ...propelled by the top engineers in mixed-signal... ...are seeking a senior‑level, hands‑on CAD automation engineer to... ...consistent, reliable design flows.You’ll collaborate... ...combining software, methodology, and close...Full timeWork at officeImmediate start
- ...career.THE ROLE: Our CAD team delivers... ...industry-leading methodologies for 3D IC stack and... ...packaging design. Our flows encompass 3D... ...across sites and time zones, and eager to... ...with chip- or system-level netlists and ability... ...in computer engineering/Electrical Engineering...
- ...Your ImpactAs a key CAD member of Marvell Central Engineering, you will play a leading... ...automated design flow and its add-on tools... ...infrastructure, methodology and workflows.What You... ...ULV challenges.Good level of scripting in Tcl... ...transcription apps, real-time answer generators...Permanent employmentFull timeInternshipWork from home
$167.1k - $250.7k
...Technologies, Inc.Job Area:Engineering Group, Engineering... ...CPU Integration CAD engineer, you will... ...tools and flows. Your tools and flows... ...release flows and methodologies for floorplanning(... ...or CAD roleHigh level of programming proficiency... ...-route, analysis, timing sign-off and...Work experience placementWork from homeWorldwide- ...Technologies group seeks a Signoff Engineer to drive complex mixed-signal... .... You will develop signoff methodologies, perform power and EMIR analyses, and refine EDA flows across gate and transistor levels. You will partner with Design, CAD, and Technology teams to...
- ...Impact As a key CAD member of Marvell Central Engineering, you will play a... ...generation automated design flow and its add-on tools... ...infrastructure, methodology and workflows. What... .... ~ Good level of scripting in Tcl... ...transcription apps, real-time answer generators like...Permanent employmentFull timeInternshipWork from home
- ...DescriptionAs an ASIC STA Engineer, you will have... ...in terms of timing. Key responsibilities... ...STA and sign-off flow development, ownership... ...of IP and block level timing constraints... ...structure, with CAD to understand and... ...closure flow and methodology.The ideal candidate...
$100k
...an Physical Design Engineer to lead cross-functional... ...-to-end RTL-to-GDS methodologies across advanced... ...production physical design flows, creating custom CAD tools and partnering... ...various experience levels for this role.... ...efficiency, turnaround time, and QoR.Optimize EDA...Permanent employment$168k - $264.5k
...seeking a Senior P&R Methodology Architect to... ...generation RTL2GDS flow for advanced nodes... ...is required. Our engineers enjoy unusually high... ...the ‘long tail’ of timing closure and performance... ..., signoff, and CAD/methodology teams... ...- 264,500 USD for Level 4, and 196,000 USD...Full time- ...career.THE ROLE: In this role, as part of CAD Methodology team, you’ll have the opportunity to... ..., experienced, detail-oriented timing analysis engineer with strong technical knowledge and excellent... ...and deliver timing methodology flow for next generation designs.Release high...
$143.8k - $230k
...Note:1. If you are a first time user, please create your... ...Description:Broadcom Central Engineering is looking for an engineer... ...shell scripting and tool-flow integration.Creation of... ...years of EDA experience. User level familiarity with related CAD Tools: Calibre, Virtuoso...Full timeLocal area$167.1k - $250.7k
...Technologies, Inc. Job Area Engineering Group, Engineering... ...CPU Integration CAD engineer, you will... ...tools and flows. Your tools and... ...release flows and methodologies for floorplanning(... ...or CAD role High level of programming proficiency... ...-route, analysis, timing sign-off and PDV...Work experience placementWorldwide$168k - $264.5k
...for a Senior CPU Design Methodology Engineer!The complexity of chip development... ...directly with unit-level ASIC, Physical Design, CAD, Package Design, Software... ...-Chip design/integration flow, and design... ...Austin; US, AZ, Remote; US, CA, Santa ClaraType: Full timeFull timeRemote work$147.4k - $272.1k
...supporting the implementation flow from RTL through GDS signoff.... ...challenges. You'll develop the methodologies, tools, and optimized flows that... ...through place-and-route and timing signoff to show actual PPA improvements... ...Genus Experience working with CAD Tools & flow Minimum...Relocation$121.9k - $195k
...1. If you are a first time user, please create your... ...and implementation flow.· Ability to work independently... ...or Computer Engineering or equivalent· Bachelors... ...Power analysis of RTL and gate level netlists· Familiarity... ...for test) and scan methodology· Version control (svn,...Full timeLocal area- ...Software - Hardware /Full Time /HybridFor over four... ...been propelled by the top engineers in mixed-signal... ...hands-on, highly driven CAD engineer to own and elevate... ...ready analog simulation flows that power our most... ...into disciplined, robust methodologies. If you’re motivated by...Full timeWork at officeImmediate start
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