Fpga Engineer

Job Title FPGA Engineer Job Description The FPGA Engineer designs and develops software‑defined radio (SDR) communication payloads for advanced space missions, including deep‑space, lunar, and Mars systems. The role focuses on creating, implementing, and maintaining FPGA designs using Verilog, SystemVerilog, or VHDL, with a strong emphasis on digital signal processing and rigorous verification for space flight and defense applications. Responsibilities Design, develop, and maintain FPGA‑based solutions for SDR communication payloads used in deep‑space, lunar, and Mars missions. Implement FPGA designs using Verilog, SystemVerilog, or VHDL to meet performance, reliability, and safety requirements for space systems. Design and integrate digital signal processing functions, including filtering, modulation and demodulation, channelization, and rate conversion, into FPGA architectures. Perform simulation and functional verification of FPGA designs using tools such as QuestaSim and Vivado Simulator to ensure correctness and robustness. Support validation activities to confirm that FPGA implementations meet system‑level requirements for space flight and defense industry applications. Document FPGA designs, simulation results, and verification procedures to support design reviews, traceability, and long‑term maintainability. Collaborate with cross‑functional engineering teams to define requirements, refine architectures, and integrate FPGA solutions into larger communication systems. Contribute to continuous improvement of FPGA design, verification, and validation processes to enhance quality and efficiency across multiple space flight programs. Essential Skills Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field. 5+ years of FPGA design and development experience. Proficiency in Verilog, SystemVerilog, or VHDL for FPGA design. Hands‑on experience with Xilinx Vivado for FPGA development. Experience with simulation and verification of FPGA designs using tools such as QuestaSim and Vivado Simulator. Background working with space flight or defense industry systems. Strong skills in verification and validation of digital designs. Ability to design and integrate digital signal processing functions such as filtering, modulation/demodulation, channelization, and rate conversion. Additional Skills & Qualifications Experience contributing to hardware development on complex space flight programs. Familiarity with software‑defined radio (SDR) architectures and communication payload design. Ability to work effectively in a growing, highly technical engineering team. Strong documentation and communication skills to support design reviews and collaboration. Work Environment This role is part of a growing engineering team based in Southern California that focuses on cutting‑edge space communication systems. The current team consists of experienced engineers with deep space and research backgrounds, and the group is expanding from four to approximately ten members over the coming months. You will work in a collaborative, technical environment that uses industry‑standard FPGA tools such as Xilinx Vivado and simulation environments like QuestaSim and Vivado Simulator. The culture emphasizes innovation, rigorous engineering practices, and the opportunity to directly influence hardware development across multiple space flight programs. Job Type & Location Contract to Hire position based out of Whittier, CA. Pay And Benefits Pay range: $75.00 – $95.00 per hour. Benefits Medical, dental & vision Critical illness, accident, and hospital 401(k) retirement plan – pre‑tax and Roth post‑tax contributions available Life insurance (voluntary life & AD&D for employee and dependents) Short and long‑term disability Health spending account (HSA) Transportation benefits Employee assistance program Time off/leave (PTO, vacation or sick leave) Workplace Type Hybrid position in Whittier, CA. Application Deadline This position is anticipated to close on June 19, 2026. Equal Opportunity & Legal Notices The company is an equal‑opportunity employer and will consider all applications without regard to race, sex, age, color, religion, national origin, veteran status, disability, sexual orientation, gender identity, genetic information or any characteristic protected by law. If you would like to request a reasonable accommodation due to a disability, please email View email address on click.appcast.io. San Francisco Fair Chance Ordinance: Pursuant to the San Francisco Fair Chance Ordinance, for all positions located in the city and county of San Francisco, we will consider for employment qualified applicants with arrest and conviction records. Massachusetts Lie Detector: It is unlawful in Massachusetts to require or administer a lie detector test as a condition of employment or continued employment. An employer who violates this law shall be subject to criminal penalties and civil liability. Use of Artificial Intelligence (AI): We may use AI to support parts of our hiring process, including sourcing, screening, and evaluating candidates. AI helps assess applications and qualifications, but final decisions are made by our hiring team. By applying, you acknowledge and agree that your application may be reviewed using AI tools. #J-18808-Ljbffr Actalent