Chief Architect, AI Infrastructure & Memory Systems (VP/CTO)

Job Description

Job Description

Chief Architect, AI Infrastructure & Memory Systems (VP/CTO)

Job Title: Chief Architect, AI Infrastructure & Memory Systems (VP/CTO)
Location: San Jose, CA or Irvine, CA
Compensation: $375K - $425K base, plus bonus and equity
Requirements: Chief Architect (VP/CTO), AI Infrastructure, Memory Systems, AI Inference, PCIe/UCIe/CXL, GPU / AI Accelerator Architecture, DDR/HBM/RDIMM, AI Data Center Systems Architecture

Company Brief

We are a technology company developing advanced memory and computing solutions for data center, server, and AI infrastructure markets. Our customers and partners include leading server OEMs, hyperscalers, cloud service providers, and technology companies.

As AI workloads rapidly reshape data center architecture, we are expanding beyond traditional memory products to develop next-generation solutions at the intersection of AI, memory, compute, interconnect, storage, data movement, and power efficiency.

We are looking for an exceptional Chief AI Systems Architect to help define the future by leading exploration and architecture of next-generation memory-centric computing platforms for AI inference, including HBM, DDR, CXL, memory pooling, KV-cache infrastructure, near-memory computing, AI accelerators, and heterogeneous compute.

Role

This is a highly technical role for an individual who combines deep understanding of AI workloads with strong computer architecture and systems expertise. The successful candidate will identify emerging bottlenecks in AI infrastructure, develop new product concepts, evaluate emerging technologies, and lead the architecture of solutions that address real customer problems.

We are particularly interested in opportunities involving:

• AI Data Center infrastructure
• Memory hierarchy and data movement
• HBM, DDR, CXL, PCIe and advanced interconnects
• AI context memory and KV-cache infrastructure
• Memory pooling and disaggregation
• Near-memory and processing-in-memory architectures
• AI accelerator and heterogeneous-computing architectures
• Memory compression and intelligent data placement
• AI infrastructure power and thermal efficiency
• Edge AI and inference
• Advanced chiplet and silicon technologies
  The role is for someone who can challenge conventional architectures and turn emerging technology trends into compelling products.

Key Responsibilities

Technology and Product Vision

• Identify major technical and architectural bottlenecks emerging in AI data centers and inference systems.
• Develop a deep understanding of how LLMs, generative AI, agentic AI, and other AI workloads are evolving.
• Anticipate how workload changes will affect memory capacity, bandwidth, latency, power, networking, storage, and system architecture.
• Generate and evaluate new product concepts that address these emerging problems.
• Assess build-versus-buy-versus-partner opportunities for emerging technologies.

AI Systems Architecture

• Architect next-generation AI computing and memory systems spanning compute, memory, interconnect, storage, and software.
• Explore alternative memory hierarchies involving HBM, HBF, DDR, CXL memory, persistent memory, NVMe, and emerging memory technologies.
• Analyze the architectural implications of KV cache, long-context inference, model weights, activations, embeddings, and other AI data structures.
• Evaluate opportunities for memory pooling, disaggregation, intelligent caching, compression, prefetching, and data placement.
• Investigate near-memory computing, processing-in-memory, chiplets, heterogeneous computing, and other approaches for reducing data movement and energy consumption.
• Develop system-level architectures and performance models to quantify bandwidth, latency, capacity, throughput, power, and cost.

Product Definition and R&D Leadership

• Translate architectural concepts into technically and commercially viable product requirements.
• Work closely with semiconductor, hardware, firmware, software, and systems engineering teams to develop prototypes and proof-of-concept platforms.
• Define performance targets, benchmarks, interfaces, workloads, and validation methodologies.
• Lead technical feasibility studies and architecture trade-off analysis.
• Guide R&D teams through architecture definition, prototyping, and product development.
• Work with customers and partners to validate problems, requirements, and potential solutions.

Industry and Technology Intelligence

• Track developments from hyperscalers, AI accelerator companies, semiconductor vendors, startups, universities, and standards organizations.
• Monitor developments in AI models, inference frameworks, accelerators, memory technologies, CXL, UCIe, chiplets, and related technologies.
• Identify technologies, startups, patents, research programs, and companies that could provide strategic value.
• Evaluate potential acquisition, licensing, or technology partnership opportunities.

Customer and Executive Engagement

• Engage directly with senior technical personnel at hyperscalers, OEMs, cloud service providers, semiconductor companies, and strategic partners.
• Understand customers' current and emerging infrastructure problems and translate those requirements into product opportunities.
• Present technology strategies, architecture proposals, and product concepts to executive management and engineering leadership.
• Represent the company at major industry conferences and technical forums.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. PhD preferred.
• 10+ years of experience in computer architecture, semiconductor systems, AI infrastructure, memory systems, or a closely related field.
• Deep understanding of modern AI/ML workloads, particularly LLM inference and large-scale AI systems.
• Strong understanding of computer architecture and memory hierarchies.
• Experience with one or more of HBM, DDR, CXL, PCIe, UCIe, chiplets, accelerator architectures, or high-speed interconnects.
• Demonstrated experience developing or architecting complex hardware or software systems.
• Ability to reason quantitatively about bandwidth, latency, capacity, power, performance, and cost.
• Ability to move from an abstract industry problem to a concrete system architecture and product concept.
• Excellent communication skills and ability to communicate complex technical concepts to both engineers and business executives.

Highly Desired Experience with several of the following:

• LLM inference architecture
• KV-cache management
• GPU/AI accelerator architecture
• CXL 2.0/3.0 memory pooling and disaggregation
• Processing-in-memory and near-memory computing
• Memory compression or intelligent memory management
• Distributed inference
• Edge AI and low-power inference
• Performance modeling and workload characterization
• ASIC/SoC architecture
  #Enghp

Benefits

• Vacation/PTO
• Medical
• Dental
• Vision
• Bonus
• Equity
• 401k w/ match
  
  
  

- For this position, you must be currently authorized to work in the United States without the need for sponsorship for a non-immigrant visa. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance.This job was first posted by CyberCoders on 10/08/2026 and applications will be accepted on an ongoing basis until the position is filled or closed. Everforth CyberCoders is proud to be an Equal Opportunity Employer

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. Our hiring process includes AI screening for keywords and minimum qualifications, and a virtual recruiter as part of the application process. A human recruiter reviews all results. Everforth CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable state and local law, including but not limited to the Los Angeles County Fair Chance Ordinance, the San Francisco Fair Chance Ordinance, and the California Fair Chance Act. Everforth CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. Individuals needing special assistance or an accommodation while seeking employment can contact a member of our Human Resources team at ****** to make arrangements.