FPGA Design/Verification Engineer

Job Description
Job #219399

Chipton-Ross is seeking a FPGA Design/Verification Engineer for a contract opportunity in Littleton/Waterton, CO.

BASIC QUALIFICATIONS (REQUIRED SKILLS/EXPERIENCE)

• UltraScale Plus
• Versal
• Experience with Vivado, and Synopsys Tools (Simulation, Lint/CDC, and Synthesis)
• Design experience using the following languages: Verilog, System Verilog, and VHDL
• Quick learner, someone who can get up to speed quickly with current designs
• Ability to quickly understand requirements documentation
• Experience with debugging designs both in the lab and in simulation environment
• Willingness to work with other teams to debug designs
• Willingness to work on Circuitware document for milestone review prep (Requirements documentation, analysis, presentation materials)
• Experience using Python

REQUIRED EDUCATION

Accredited Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.

WORK HOURS

Full-Time; 4/10-1st Shift.

ADDITIONAL INFORMATION

• Employment will be contingent on clearing a drug screen and background check. Both must clear prior to start date.
• Candidates responding to this posting must currently possess the eligibility to work in the United States. No third parties please.

For more information, please apply or contact:



Anthony Ho View phone number on click.appcast.io
View email address on click.appcast.io


Chipton-Ross provides equal employment opportunities to all employees and applicants for employment without regard to race, color, creed, religion, national origin, sex (including pregnancy), age, disability, sexual orientation, gender identity and/or expression, protected veteran status, genetic information, or any other characteristic protected by Federal, State or local law. This policy governs all areas of employment at Chipton-Ross, including recruiting, hiring, training, assignment, promotions, compensation, benefits, discipline, and terminations.