Senior ASIC Floorplan Design Engineer

NVIDIA, 11001 Lakeline Blvd., Austin, TX 78717 Job Description: NVIDIA is looking for an experienced ASIC Floorplan Engineer to design and implement cutting-edge SOCs, CPUs, and GPUs. This role offers the chance to influence the development of next-generation technology across various product lines, including consumer graphics, self-driving cars, and artificial intelligence. Join a global team dedicated to pushing the boundaries of computing. Responsibilities: Collaborate with multi-disciplinary teams to optimize chip floorplans for cost, area, performance, and power. Drive floorplan development and work with ASIC and Physical design teams to identify and resolve technical issues. Develop AI workflows and productivity tools to enhance chip area optimization and execution speed. Identify technical and product risks, collaborating with engineering and management to implement mitigation strategies. Qualifications: MSEE/MSCE or equivalent experience in chip development. 10+ years of experience in SOC, CPU, graphics, memory, and I/O sub-systems development. Experience with physical design methodologies, chip floorplan, power/clock/reset distribution, DFT, place and route, timing closure, and packaging. Skills: Strong written, verbal, and technical communication skills. Proficiency in programming languages such as Python, Perl, and/or C++. Ability to multi-task and resolve complex technical issues across engineering teams. Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Find the Right Semiconductor Partner Tell us what you're building and we'll recommend qualified vendors for your project. ASIC Design Services Verification Packaging & Wafer Semiconductor IP Work Email Free No obligation Response within 24 hours #J-18808-Ljbffr Anysilicon