ASIC/FPGA Verification Engineer 5
Boeing Company
This posting is for a contract assignment and is not a full-time employment offer with Boeing. Candidates selected for roles will be employed as contract workers through a Boeing approved 3rd party for the duration of the specified project. Regular and predictable attendance is required
Work statement is a non-managerial role, non-leadership role.
Resolves complex issues on critical programs related to architectural approaches, requirements, specifications and design. Leads technical aspect of proposal preparation. Identifies critical performance measures and develops processes for computing them. Leads activities in support of Supplier Management with make/buy recommendations and other technical services. Coordinates engineering support throughout the lifecycle of the product. Develops new concepts for future product designs to meet projected requirements. Recommends and manages technology insertion. Works under consultative direction. Required Skills
Engineering-minded verification engineers, not simply engineers who write test cases.
7 or more years of verification 2+ UVM experience, though 5+ years is acceptable if UVM experience is solid.
Strong SystemVerilog and UVM experience
Self-checking and constrained-random verification; verification planning
Debugging; coverage closure
Active U.S. security clearance Ideal candidates will:
Demonstrate strong digital hardware fundamentals.
Exercise sound engineering judgment.
Work independently with minimal oversight.
Communicate clearly and proactively.
Produce high-quality technical documentation.
Take ownership of their work and deliver maintainable engineering solutions.
Work statement is a non-managerial role, non-leadership role.
Resolves complex issues on critical programs related to architectural approaches, requirements, specifications and design. Leads technical aspect of proposal preparation. Identifies critical performance measures and develops processes for computing them. Leads activities in support of Supplier Management with make/buy recommendations and other technical services. Coordinates engineering support throughout the lifecycle of the product. Develops new concepts for future product designs to meet projected requirements. Recommends and manages technology insertion. Works under consultative direction. Required Skills
Engineering-minded verification engineers, not simply engineers who write test cases.
7 or more years of verification 2+ UVM experience, though 5+ years is acceptable if UVM experience is solid.
Strong SystemVerilog and UVM experience
Self-checking and constrained-random verification; verification planning
Debugging; coverage closure
Active U.S. security clearance Ideal candidates will:
Demonstrate strong digital hardware fundamentals.
Exercise sound engineering judgment.
Work independently with minimal oversight.
Communicate clearly and proactively.
Produce high-quality technical documentation.
Take ownership of their work and deliver maintainable engineering solutions.
Vacancy posted 1 day ago
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