Staff ASIC Engineer: RTL & LPDDR PHY for AI & Mobile
Synopsys Inc
Synopsys Inc. is seeking an experienced ASIC digital design engineer to own RTL for LPDDR PHY IP in production silicon. You will work across architecture, verification, and physical design teams to ensure timing closure, power optimization, and design quality. Responsibilities include developing RTL modules, implementing synthesis-ready designs, and building automation to streamline design flows. Collaboration and data-driven tradeoffs are essential for delivering high-performance IP across #J-18808-Ljbffr Synopsys Inc
Vacancy posted 19 hours ago
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