ASIC Physical Design Engineer (Hybrid)

Job Description

Mentium Technologies Inc. is seeking an experienced and highly motivated Physical Design Engineer to join our ASIC/SoC design team. In this role, you will be responsible for the physical implementation of complex ASIC designs from synthesis through place and route, DRC/LVS and tapeout. You will work closely with RTL designers, architects and OSAT, foundry partners to ensure high-quality, timing-clean, and manufacturable silicon. This role offers an exciting opportunity to learn and work on cutting-edge vision AI accelerators, machine and deep learning algorithms, and make a meaningful impact on the development of a co-designed robust, client-facing hardware-software library.

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This role requires strong expertise in physical implementation methodologies, optimization techniques, and industry-standard EDA tools.

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Key Responsibilities

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• Perform full-chip and block-level physical design, including: Synthesis, Design-for-Test, Collateral setup / Library preparation, Floorplanning and power planning, Placement and clock tree synthesis (CTS), Routing and post-route optimization, and Static Timing Analysis and Closure
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• Drive timing closure across all corners and modes (setup/hold, SI, IR/EM)
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• Develop and refine physical design flows and methodologies
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• Develop DFT flows and integrate DFT IP
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• Collaborate with front-end, and verification teams for design integration
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• Analyze and resolve congestion, timing, and power issues
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• Perform physical verification (DRC/LVS/antenna)
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• Support tapeout activities and post-silicon debugging when required
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• Evaluate and integrate third-party IP and tools into physical design flows
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• Automate repetitive tasks using scripting (Python, tcl, shell)
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Required Qualifications

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PhD/MS/BS in Electrical Engineering, Computer Engineering, or equivalent

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3+ years of ASIC physical design experience

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Strong understanding of:

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• CMOS process technology
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• Timing constraints, timing analysis and closure techniques
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• Power integrity and signal integrity fundamentals
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• DRC and LVS debug
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Hands-on experience with industry EDA tools such as:

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• Synopsys Design Compiler / ICC2 or Fusion Compiler
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• PrimeTime
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• StarRC
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Experience with Synthesis including DFT (scan, JTAG, MBIST, LBIST)

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Experience with full-chip or large block implementation

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Strong debugging and problem-solving skills

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Silicon-proven tapeout experience

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Key Attributes

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Detail-oriented with strong analytical skills

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Effective communicator in both written and verbal contexts

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Self-driven with the ability to manage multiple priorities

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Process-oriented with a focus on continuous improvement

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Ability to work independently and collaboratively

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Why Join Mentium?

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At Mentium, you'll be at the forefront of vision AI technology, working alongside a talented team dedicated to innovation. We offer a collaborative environment where your contributions directly influence the development of cutting-edge solutions. Join us to make a meaningful impact in the field of vision AI.

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Benefits:

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• Competitive compensation packages
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• Opportunity to work on diverse, cutting-edge AI projects across a range of industries.
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• 401(k)
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• Flexible PTO
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• Full PPO medical, dental, and vision insurance coverage
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