R&D Staff Engineer - AI/ML Discrete Geometry Processing

Category Engineering Hire Type Employee Job ID 17296 Base Salary Range $138000-$207000 Remote Eligible No Date Posted 05/03/2026

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years building software that has to actually work, not demo well, actually work, under pressure, across large codebases with complex interdependencies. You know that the difference between a system that scales and one that breaks is usually a decision made three months earlier, and you are the kind of engineer who catches that decision before it ships. Or maybe you are fresh out of a PhD or MS program in CS or EE, and you have been deep in research that made you think hard about parallel algorithms, GPU architectures, or systems-level performance, and you are ready to take that foundation into production-grade EDA software.

Either way, you do not need perfect requirements to get started. You ask the right questions, align with stakeholders, and find a way through ambiguity without creating more of it downstream. You are comfortable moving between C++ performance-critical work and emerging technologies like CUDA without losing the thread of what you are actually building. The idea of reformulating a placement or routing problem to run on a GPU does not intimidate you, it excites you. At Synopsys, you will work on GPU-accelerated digital implementation tools that power semiconductor design across the industry. The team is global, the codebase is real, and what you build will matter.

What You'll Be Doing

• Design, develop, and own GPU acceleration for engines across the Fusion Compiler R2G flow, including placement, global routing, detail routing, clock tree synthesis, optimization, timing analysis, extraction, legalization, and synthesis
• Reformulate complex EDA algorithms to take full advantage of GPU architectures, balancing performance, memory constraints, and numerical accuracy
• Own projects end to end, from requirements gathering and design specification through development, testing, deployment, and direct customer interaction
• Collaborate closely with cross-functional teams including product management, product engineering, and field teams to align acceleration strategies with real customer workflows
• Debug and optimize performance-critical C/C++ code and CUDA kernels across large, multi-component codebases
• Contribute to the ongoing Nvidia and Synopsys GPU acceleration collaboration, helping define what industry-first GPU-accelerated digital implementation looks like

The Impact You Will Have

• Enable customers to reduce design cycle time and time to market by accelerating compute-intensive stages of physical design with GPU technology
• Deliver production-quality GPU-accelerated engines that handle advanced node constraints and massive design complexity at scale
• Shape the future of EDA tooling by bringing GPU computing into workflows that have traditionally been CPU-bound
• Influence product roadmaps and technical direction through direct engagement with customers and internal stakeholders
• Mentor junior engineers and fresh graduates, elevating the technical capability and knowledge base of the team
• Contribute to a collaboration between Synopsys and Nvidia that is redefining what is possible in digital implementation performance
• Help Synopsys maintain its leadership position in chip design and verification by pushing the boundaries of computational performance

What You'll Need

• Bachelor's, Master's, or PhD in Computer Science, Electrical Engineering, or a related field with a strong academic record
• For experienced candidates, 3 to 6 years of hands-on experience developing software projects, preferably in EDA, semiconductor, or high-performance computing domains
• For fresh PhD or MS graduates, demonstrated proficiency in C/C++ through coursework, research projects, or publications, with strong foundations in algorithms, data structures, and system design
• Expert or emerging proficiency in C/C++ development, with a track record or academic evidence of delivering robust, scalable solutions
• Experience with CUDA, GPU acceleration, or GPU architecture knowledge is a strong plus but not required
• Research or project experience in areas such as GPU computing, parallel algorithms, computer architecture, or systems programming is highly valued for recent graduates

Who You Are

• You can take a complex EDA algorithm, break it down into parallelizable components, and explain the tradeoffs to a senior architect in two sentences without losing the nuance
• You are comfortable owning a project from concept to customer deployment, navigating ambiguity, shifting requirements, and cross-functional dependencies along the way
• You approach new languages and technologies with curiosity and adaptability, whether that means learning CUDA for the first time or diving into a new corner of the Fusion Compiler codebase
• You are a strong problem solver with a strategic mindset and attention to detail, someone who thinks about edge cases, memory bottlenecks, and long-term maintainability before the first line of code is written
• You are collaborative and eager to learn from others, whether that means pairing with a senior engineer on a tricky kernel optimization or presenting your work to a product management team
• You are resilient in the face of evolving challenges and requirements, and you thrive in environments that demand deep technical rigor and continuous learning

The Team You'll Be Part Of

You will join the Fusion Compiler GPU Acceleration team in Synopsys Sunnyvale, CA, or Hillsboro, OR, a group of engineers focused on developing industry-first GPU-accelerated digital implementation solutions. This development is part of the Nvidia and Synopsys GPU acceleration collaboration. This team is driving change in EDA and empowering customers worldwide by accelerating their design cycles and reducing time to market.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

#TPG

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

In addition to the base salary, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. The base salary range for this role is across the U.S.