Hardware Design Engineer

To support advanced cloud compute networking initiatives, the contract Hardware Design Engineer will validate FPGA and silicon-based networking solutions, drive key features, and enhance the validation framework for software-defined networking (SDN) accelerators while working remotely. Key responsibilities Perform design verification and FPGA validation by defining testing strategies and utilizing third-party testing equipment Develop test plans and infrastructure to complete functional validation of designs, identifying issues and preventing regressions Run tests, debug complex failures, and collaborate with cross-functional teams for successful project execution Required qualifications Bachelor's degree in Engineering 10+ years of hardware validation experience Strong programming proficiency in C/C++, SystemVerilog, Assembly, and Python Comprehensive knowledge of advanced computer architecture Hands-on experience with FPGA validation or pre-silicon and post-silicon validation environments is preferred