Hardware Engineer - ELSYS - (Open Rank)

Overview The Georgia Tech Research Institute (GTRI) is the nonprofit, applied research division of the Georgia Institute of Technology (Georgia Tech). Founded in 1934 as the Engineering Experiment Station, GTRI has grown to more than 2,900 employees, supporting eight laboratories in over 20 locations around the country and performing more than $940 million of problem‑solving research annually for government and industry. GTRI's renowned researchers combine science, engineering, economics, policy, and technical expertise to solve complex problems for the U.S. federal government, state, and industry. Project/Unit Description The Applied Embedded Systems (AES) division of the Electronic Systems Laboratory (ELSYS) supports multiple research products and projects in concert with development teams building complex, multi‑faceted embedded and electronic systems. AES focuses on the research, development, testing, and deployment of embedded electronic and electromechanical systems that provide sponsors with solutions in Electronic Warfare, Radar, command and control, communications, avionics, entertainment, physiological monitoring, and other applications. This research position will support electronic hardware and systems engineering development needs of the Open Systems Development Branch (OSDB), including developing hardware from existing open standards such as OpenVPX and creating new open standards. Job Purpose Hardware Engineers develop mixed‑signal design solutions—including analog, RF, and digital portions—for Electronic Warfare, Radar, Avionics, and Communication Systems. Key activities include RF and analog development using system, circuit, or board design and simulation tools; development of digital systems via circuit simulation, schematic capture, board layout and assembly design; bring‑up, test, and debug of hardware using network analyzers and spectrum analyzers; and integration with other system components. Additional responsibilities involve analyzing system performance, improving test processes, and collaborating with other engineering teams. Key Responsibilities Perform circuit simulation, schematic capture, and board layout for sub‑modules of a platform design Generate documentation of hardware design and theory of operation Perform lab testing activities Integrate modules with other system components Contribute to technical reports and presentations Begin taking ownership of small team development and mentoring others Contribute to white papers and competitive proposals Additional Responsibilities Develop requirements and architecture for RF/analog systems Develop RF and analog hardware at a module level according to requirements, architecture, and design Generate documentation of hardware design and theory of operation Perform advanced RF and analog lab testing activities Integrate RF/analog modules with other system components Primary author of technical reports and presentations, and lead team review of final deliverables Primary author of pertinent white papers and competitive proposals Provide technical vision to sponsors Take ownership of moderate team development and mentoring others Lead the development and composition of new/updated open architectures and standards Lead technical meetings with GTRI and sponsor personnel, and support issue tracking and hardware development planning Lead proposal efforts or new research areas suitable for internal research and development (IR&D) funding Lead teams of electrical, mechanical, and software/firmware researchers in support of sponsored research efforts Required Minimum Qualifications Experience with the definition and utilization of open architectures and standards such as OpenVPX, SOSA, HOST, OMS/UCI, Big Iron, AMS GRA, UC2, NIEM, OCI, etc. Experience developing hardware/software/firmware for embedded environments, including FPGA designs, analog/digital circuits, or other embedded hardware Knowledge of computer architectures as they relate to embedded hardware and communications standards (e.g., Ethernet, PCI Express) Familiarity with Model Based Systems Engineering (MBSE) and the utilization of SysML to execute the Systems Engineering ‘V’ Preferred Qualifications Active Secret Clearance Experience architecting/developing mission systems and/or safety‑critical systems Experience with full system lifecycle development from requirements definition to verification and validation within an MBSE environment Experience architecting/developing reference architectures with an MBSE environment Experience architecting/developing containerized software systems Experience architecting/developing RF and EO/IR sensor systems Knowledge of avionics protocols and interfaces, including but not limited to ARINC- and VITA‑standard protocols, high‑speed serial, discrete signal, MIL‑STD‑1553 and analog interfaces Travel Requirements Less than 10% travel Education and Length of Experience Levels 3, 4 This position vacancy is an open‑rank announcement. The final job offer will be dependent on candidate qualifications in alignment with Research Faculty Extension Professional ranks as outlined in section 3.2.1 of the Georgia Tech Faculty Handbook 5 years of related experience with a Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field of study 3 years of related experience with a Master’s degree in Electrical Engineering, Computer Engineering, or related field of study 0 years of related experience with a Ph.D. in Electrical Engineering, Computer Engineering, or related field of study U.S. Citizenship Requirements Due to our research contracts with the U.S. federal government, candidates for this position must be U.S. Citizens. Clearance Type Required Candidates must be able to obtain and maintain an active security clearance. Benefits at GTRI Comprehensive information on currently offered GTRI benefits, including Health & Welfare, Retirement Plans, Tuition Reimbursement, Time Off, and Professional Development, can be found through this link: Equal Employment Opportunity The Georgia Institute of Technology (Georgia Tech) is an Equal Employment Opportunity Employer. The Institute is committed to maintaining a fair and respectful environment for all. To that end, and in accordance with federal and state law, Board of Regents policy, and Institute policy, Georgia Tech provides equal opportunity to all faculty, staff, students, and all other members of the Georgia Tech community, including applicants for admission and/or employment, contractors, volunteers, and participants in institutional programs, activities, and services. Georgia Tech complies with all applicable laws and regulations governing equal opportunity in the workplace and in educational activities. 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