Senior Hardware Design Verification Engineer (SystemVerilog/UVM)

Job Description

Job Description

Team Red Dog is hiring a Senior Hardware Design Verification Engineer (SystemVerilog/UVM) for our client, a leading cloud and software provider and industry-leading technology partner. In this fully remote role, you'll help verify the next generation of Azure networking hardware, contributing to Azure Boost SmartNIC and FPGA technologies that power one of the world's largest cloud platforms. You'll develop and execute SystemVerilog/UVM verification solutions, create comprehensive test plans, automate verification workflows, and partner closely with hardware design engineers to ensure high-quality, high-performance silicon. This is a rare opportunity to influence cutting-edge cloud infrastructure while working on technologies deployed at hyperscale.

Top Required Skills (Must Haves):

1. SystemVerilog & UVM (7+ years preferred) – Develop, enhance, and execute verification environments, testbenches, assertions, sequences, constraints, and functional coverage for complex IP and SoC hardware designs.
2. Hardware Design Verification – Perform pre-silicon verification, execute comprehensive test plans, drive coverage closure, debug design issues, and collaborate closely with RTL design teams throughout the development lifecycle.
3. Networking Hardware & Industry Protocols – Experience verifying networking or storage datapaths with knowledge of protocols such as Ethernet, PCIe, AXI, and AHB within complex hardware systems.
4. Python and/or Perl Automation – Develop scripts that automate regression testing, continuous integration (CI), verification workflows, and test execution to improve engineering efficiency.

Opportunity Overview:

Join a team responsible for validating the networking technologies that power one of the world's largest cloud platforms. As part of a highly collaborative hardware verification organization, you'll contribute to Azure networking acceleration technologies, including FPGA-based SmartNIC solutions, next-generation Software-Defined Networking (SDN), Remote Direct Memory Access (RDMA), and high-performance networking infrastructure. This fully remote opportunity offers the chance to work on challenging verification problems while partnering with world-class hardware engineers on technologies deployed at massive global scale.

How you will make an impact:

• Develop comprehensive verification plans for new hardware features and functionality.
• Execute verification strategies using SystemVerilog and UVM within established verification environments.
• Create and enhance sequences, assertions, constraints, scoreboards, and functional coverage.
• Design directed, constrained-random, and stress test scenarios to validate functionality and corner cases.
• Drive functional, code, assertion, and test plan coverage to verification closure.
• Debug complex hardware issues and partner with RTL designers to resolve functional and performance defects.
• Develop Python and/or Perl automation scripts supporting regression testing and CI/CD workflows.
• Participate in Agile development activities including sprint planning, code reviews, and iterative feature development.
• Analyze regression results, perform root-cause analysis, and support bug triage activities.
• Improve verification quality through error injection, congestion, recovery, and backpressure testing.

The expertise you bring:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
• Approximately 7+ years of hands-on hardware design verification experience using SystemVerilog and UVM.
• Strong experience performing IP and/or SoC-level pre-silicon verification.
• Solid understanding of RTL design concepts and modern verification methodologies.
• Experience with networking or storage hardware verification preferred.
• Knowledge of networking protocols including Ethernet, PCIe, AXI, AHB, or similar high-speed interfaces.
• Experience developing automation using Python and/or Perl.
• Strong debugging, analytical, and problem-solving skills.
• Ability to work independently within established verification environments.
• Excellent communication and collaboration skills.
• Ability to support Pacific Time working hours with approximately 2–3 hours of overlap.
• Ability to commit to an engagement expected to last approximately 18 months.

What makes a candidate highly successful in this role:

Successful candidates bring deep expertise in SystemVerilog, UVM, and hardware design verification while demonstrating the ability to quickly contribute within an existing verification environment. They have experience validating complex IP or SoC designs, developing reusable verification components, driving comprehensive coverage closure, and collaborating effectively with hardware design teams to resolve challenging issues. Experience verifying networking hardware, SmartNICs, storage datapaths, FPGA technologies, or cloud infrastructure components is highly valued, as is a proven ability to independently own verification efforts from planning through execution and debugging.

Why Work with Team Red Dog?

At Team Red Dog, people are at the heart of everything we do. Our commitment to personalized service and our deep experience in matching talented professionals with meaningful roles at some of the world's most inspiring companies is what sets us apart. We take the time to understand your unique skills, strengths, and passions—because we believe your career should reflect who you are.

Whether you're looking to grow, pivot, or simply find a place where your work truly matters, we offer opportunities that empower you to make a positive impact. With excellent benefits, a supportive team, and a role where you can thrive while doing what you love, we're here to help you take the next step with confidence. Join us—and discover what it means to be genuinely valued in your career.

Generous benefits package for qualified employees includes:

• Health insurance (medical, dental, vision, and life)
• Employer-matched 401K plan
• Accrued Paid Time Off
• Flexible Paid Holiday Benefit

Estimated Start Date: Immediately

Location: Fully Remote (U.S.) – Must be available to support Pacific Time working hours.

Job #2580

Job Type and Estimated Duration: W2 contract opportunity through June 30, 2027, with the potential to extend up to 18 months total, subject to performance, budget, and client discretion.

Rate: $92–$98/hour

Team Red Dog is committed to providing equal opportunities to everyone, regardless of race, ethnicity, gender, age, religion, sexual orientation, disability, or any other characteristic. If you need accommodation during the recruitment process, reach out to View email address on us.fitly.work, and we will work to ensure an accessible experience. We strictly adhere to federal, state, and local laws to maintain a workplace free from discrimination and harassment.

We offer competitive compensation aligned with U.S. industry standards, and our final offer will reflect the candidate's location, job-specific skills, experience, and knowledge.

• All applicants must be authorized to work in the U.S. without the need for sponsorship.
• Team Red Dog is an E-Verify employer.
• Employment is contingent upon the successful completion of a reference and background check.
• Please no solicitations from C2C or recruiting firms.