Hardware Engineer IV

Job Responsibilities:

• Review CM-generated validation reports: verify data quality, flag anomalies, confirm pass/fail criteria are correctly applied
• Analyze validation failures; determine whether issues are measurement errors, design defects, or assembly quality problems
• Coordinate with EE design partners to present data, propose root cause hypotheses, and support corrective action decisions
• Track open issues through resolution; ensure fixes are validated and closed in a timely manner
• Facilitate communication between CM, EE design, layout, and firmware teams to keep issues moving
• Maintain issue tracker and provide regular status updates to the FTE validation lead
• Monitor overall validation progress against milestones; escalate risks and blockers early CM Guidance (~20%)
• Develop clear, repeatable test procedures (SOPs) that CM technicians can execute independently
• Train and guide CM engineers/technicians on proper measurement techniques, probe placement, fixture usage, and data collection
• Define probe points and measurement access strategy; communicate to CM with annotated layout markups
• Provide real-time technical guidance to CM when measurements yield unexpected results
• Establish clear acceptance criteria and escalation paths for CM to follow, in alignment with the FTE validation lead
• Perform PI/SI measurements that require senior-level judgment (e.g., first article bring-up, intermittent failures, subtle noise sources)
• Validate CM measurement setups by performing correlation measurements
• Debug escalated issues that CM cannot resolve independently
• Develop new measurement methodologies and fixtures for novel circuits or challenging probe access
• Support prototype bring-up and characterization during build phases

Skills:

• 4+ years of EE hardware validation experience with strong emphasis on power integrity and signal integrity
• Ability to develop test procedures that others execute — clear technical writing, structured SOPs, annotated diagrams. Strong schematic reading skills — trace signal paths, understand power distribution, map circuit function from schematics and datasheets
• PCB layout review experience — assess probe access, SI/PI risk, debug strategy. Expert-level knowledge of lab instruments: high-bandwidth oscilloscopes, power rail probes, active/differential probes, current probes, spectrum analyzers
• Experience with wearable, mobile, or IoT hardware (space-constrained, low-power designs)
• Familiarity with proto/EVT/DVT/PVT build cycles and NPI environments
• Experience with issue tracking systems and cross-functional coordination in hardware programs.

Education/Experience:

• BS/MS in Electrical Engineering
• 4+ years of EE hardware validation experience with strong emphasis on power integrity and signal integrity
• Proven ability to analyze test data, identify root causes, and drive issues to closure with cross-functional teams
• Experience reviewing test reports for correctness, identifying gaps, and driving follow-up actions
• Ability to develop test procedures that others execute — clear technical writing, structured SOPs, annotated diagrams
• Strong schematic reading skills — trace signal paths, understand power distribution, map circuit function from schematics and datasheets
• PCB layout review experience — assess probe access, SI/PI risk, debug strategy
• Expert-level knowledge of lab instruments: high-bandwidth oscilloscopes, power rail probes, active/differential probes, current probes, spectrum analyzers
• Experience with DC-DC converter characterization and high-speed digital signal measurements
• Solid understanding of transmission line theory, impedance matching, and flex PCB signal integrity challenges
• Strong communication skills — ability to explain complex EE issues clearly to CM teams and design partners