Memory Controller Designer/RTL Engineer

Location Preferred: Austin, TX Secondary: San Jose, CA and San Diego, CA. Hybrid work 3 days per week. Duration: 6 months. Job Summary Samsung is a world leader in Memory, LCD and System LSI technologies. The System IP team develops proprietary coherent interconnect and memory controller deployed in many high-volume products. This role will support the development of custom memory controller micro-architecture for LPDDR5 and LP. Job Description Senior designer on custom memory controller micro-architecture, working with system architects, verification, performance/power, and design implementation teams. Own and drive critical RTL design, performance and power optimization, logic debug, and timing closure. Key Responsibilities Drive timely development and debugging of new features on custom memory controller. Deliver SOC IP with all sanity checks. Work on timing debug and closure. Perform LINT, CDC flows and analysis. Use power analysis flows. Maintain ECO flows. Collaborate with verification team to verify functionality and correctness. Collaborate with implementation team to achieve timing and area goals. Produce high-quality RTL on schedule and meet PPA goals. Engage with performance and power team to achieve performance and power goals. Partner with physical design and CAD team to resolve implementation-level details. Preferred Candidate 10+ years of experience. Degree in Computer Engineering or related field; PhD, Master’s, or Bachelor’s. Strong background owning and driving RTL design of custom memory controller sub-blocks. Demonstrated experience of successful architectural RTL design on high-performance digital designs. Verilog expertise and deep understanding of ASIC design flow, including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, and ECO. Knowledge of memory controller micro-architecture. Familiarity with LPDDR4/5 and HBM memory technologies. Knowledge of JEDEC memory standards preferred. Knowledge of AES, ECC, RAS features preferred. Strong communication and interpersonal skills. Experience with scripting language like Perl or Python. Energetic, curious, and passionate about logic design. Good written and verbal communication skills. #J-18808-Ljbffr Bayone