Sr Principal Electrical Engineer - 4

Electrical Engineer - Level 4 - Avionics Design Group

At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history.

Northrop Grumman Space Systems is currently seeking a Electrical Engineer - Level 4 - Avionics Design Group within Launch Vehicles business unit at the Chandler, AZ facility.

Job Responsibilities:

As a member of the circuit design team, you'll be responsible for circuit design and development for programs. You will perform detailed board-level digital and mixed signal circuit design, circuit analysis and simulation to verify as-designed circuit response meets requirement criteria. You will select component parts for the design to meet stringent environments, including radiation effects. You will evaluate completed design with more senior engineers and other technical groups and make modifications necessary to achieve a design that satisfies requirements. Write design and test documentation including analyses, specifications, user manuals, test procedures, etc. You will support the qualification testing phase by developing test procedures and reports. You may also oversee, with senior engineer oversight, component supplier design, analysis, manufacture, and test.

Basic Qualifications:

• Bachelors with 8 years' digital / mixed signal design experience or Masters with 6 years' experience.
• Must be capable of understanding and adhering to department design standards.
• Ability to work in an Agile project format, team-based environment, including Jira and Git environments.
• Experience with Cadence Schematic Capture and board layout using Allegro.
• Proficiency with circuit simulation including PSpice or LTSpice.
• Experienced in hardware troubleshooting / software debugging. Physical testing experience including lab measurement (oscilloscope, signal/function generator, logic analyzer, etc).
• Experience generating design documents, specifications, user's manuals, test plans and procedures.
• U.S. Citizenship is required.
• Ability to obtain/maintain a DoD Active Secret Clearance

Preferred Qualifications:

• Familiarity with Cadence Allegro PWB, CAM350, Matlab, VHDL, Python.
• Familiarity with microprocessor and/or FPGA circuit design.
• Familiarity with circuit design for military/space environments.
• Active DoD Secret Security Clearance is preferred.