High Speed EIC Design Engineer

Company Description PR Photonics develops advanced silicon-photonics technologies for next-generation AI and high-performance computing infrastructure. Our work focuses on high-bandwidth, low-power optical interconnects and co-packaged optical (CPO) engines integrating silicon photonic devices with advanced electronic integrated circuits.

We are seeking a High-Speed EIC Design Engineer to develop the electronic integrated circuits that interface directly with our silicon-photonics platforms. The engineer will work closely with our photonics, packaging, test, and system teams on tightly integrated EIC/PIC optical engines.

Responsibilities

· Design high-speed analog and mixed-signal ICs for silicon-photonics optical transceivers and CPO optical engines.

· Develop high-speed modulator drivers for microring resonator (MRR) and other silicon-photonic modulators.

· Design receiver front ends including TIA, limiting amplifier, and related high-speed analog circuitry.

· Develop circuits supporting NRZ and PAM4 signaling, targeting 100–200+ Gb/s electrical/optical lanes.

· Design low-power bias, control, monitoring, DAC/ADC interface, and calibration circuits for photonic devices.

· Develop electronics for wavelength tuning, stabilization, and control.

· Perform EIC/PIC co-design to optimize bandwidth, power consumption, signal integrity, noise, and overall link performance.

· Model electrical parasitics associated with EIC-to-PIC interconnects, including wire bonds, micro-bumps, interposers, and advanced packaging.

· Perform schematic design, simulation, layout supervision, extraction, and post-layout verification.

· Conduct high-speed signal-integrity and power-integrity analysis.

· Support IC tapeout, bring-up, characterization, debugging, and performance optimization.

· Work with silicon-photonics designers to define electrical interfaces and optimize the photonic devices and electronics as a combined system.

· Collaborate with packaging engineers on tightly integrated EIC/PIC architectures for optical engines.

· Develop test methods and analyze measured high-speed electrical and optical data.

· Document designs, simulation results, design reviews, and silicon characterization.

Qualifications Required

· PhD or M.S. in Electrical Engineering, Microelectronics, Integrated Circuits, or a closely related field.

· Strong background in high-speed analog, RF, or mixed-signal IC design.

· Experience designing circuits in advanced CMOS, SOI, or SiGe BiCMOS technologies.

· Strong understanding of transistor-level analog/RF design and high-frequency circuit behavior.

· Experience with high-speed circuit simulation, layout, parasitic extraction, and post-layout verification.

· Understanding of transmission lines, impedance matching, signal integrity, jitter, noise, and high-speed I/O.

· Experience with industry-standard IC design tools such as Cadence Virtuoso, Spectre, and related verification/extraction tools.

· Ability to work closely with photonics, packaging, and test engineers in a multidisciplinary development environment.

Preferred

· Direct experience with silicon-photonics EIC/PIC co-design.

· Experience designing drivers for Mach-Zehnder and/or MRR modulators.

· Experience designing high-speed TIAs and optical receiver front ends.

· Experience with 100G/200G-per-lane NRZ or PAM4 architectures.

· Experience with low-power optical interconnects, CPO, or optical I/O.

· Familiarity with microring resonance control, wavelength locking, thermal tuning, and feedback control.

· Experience with SerDes, CDR, equalization, FFE/DFE, or clocking circuits.

· Experience with advanced packaging, 2.5D/3D integration, flip-chip, micro-bumps, or EIC/PIC co-packaging.

· Hands-on experience characterizing high-speed ICs using oscilloscopes, VNAs, BERTs, probe stations, and optical test equipment.

· Experience taking high-speed analog or mixed-signal ICs from architecture through tapeout and silicon validation.

Ideal Candidate

The ideal candidate combines strong transistor-level high-speed IC design expertise with an understanding of optical communication systems. You should be comfortable treating the EIC, photonic IC, package, and optical link as a single system rather than independently optimized components.

This position offers the opportunity to develop extremely low-power, high-bandwidth electronic-photonic interfaces for next-generation AI computing and data-center optical connectivity.

Compensation

Base Salary: $120,000 – $200,000

In addition, eligible employees may receive: stock option grants, performance-based bonuses, comprehensive benefits package, and career growth opportunities

Why Join PR Photonics?

• Help build breakthrough technologies for AI infrastructure
• Direct impact on product and technology direction
• Meaningful equity participation
• Collaborative startup environment
• Opportunity to work alongside world-class photonics engineers\

Contact: View email address on click.appcast.io

PR Photonics is an Equal Opportunity Employer.