RTL Design Engineer (ASIC/FPGA) for Starlink
SpaceX
A leading aerospace manufacturer in California is seeking a motivated RTL Design Engineer to work on Starlink projects. This role involves designing ASICs and FPGAs, participating in the full design lifecycle, and collaborating with cross-functional teams to innovate technologies that impact user terminals and satellites. A Bachelor's degree in Electrical Engineering and experience with RTL design is required. The position offers competitive compensation along with comprehensive benefits including medical coverage and paid vacation. #J-18808-Ljbffr SpaceX
Vacancy posted 1 day ago
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