Senior BEOL Process Integration Engineer
Kforce's client, a growing semiconductor company in Portland, OR is seeking a Senior BEOL Process Integration Engineer to support the development and manufacturing of advanced IC technologies. This is a high-impact role working closely with Fab Operations and Foundry partners to improve yield, reliability, and process performance. We are working directly with the Hiring Manager on this search assignment. This role is hybrid remote. This is an excellent opportunity to join a growing semiconductor organization and play a key role in advancing next-generation IC technologies. Responsibilities:
- Lead BEOL process integration efforts to optimize product yield and manufacturing performance
- Will be performing process integration engineering in a Cu back-end Fab environment; (Back End Of Line (BEOL) manufacturing phase)
- Will be owning and optimizing the complex, multi-step sequence used to build microscopic copper electrical interconnects on semiconductor wafers
- Drive improvements in quality, reliability, cost, productivity, and process capability
- Identify yield-limiting factors and implement corrective actions with cross-functional engineering teams
- Support technology transfer and process matching with foundry partners
- Utilize SPC, FDC, DOE, and JMP to analyze data and solve complex manufacturing challenges
- BS, or MS degree in Chemical Engineering, Materials Engineering, Electrical Engineering or related field
- At least 5+ years or more of semiconductor BEOL Process Integration experience
- At least 5 years of semiconductor BEOL process integration engineering experience; Must have been in a BEOL Integration Engineer role; Will be the subject matter expert; Must be able to hit the ground running
- 5 years of experience being an actual process integration engineer in a Cu back-end Fab process; (Back End Of Line (BEOL) manufacturing phase)
- As a BEOL Process Integration Engineer, must have strong work experience with the following process modules such as: Photo, Etch, Thin Films, and CMP
- Strong experience owning and optimizing the complex, multi-step sequence used to build microscopic copper electrical interconnects on semiconductor wafers
- Strong experience looking at the entire end-to-end interconnect flow
- Experience partnering with Process and Yield Engineering teams to improve fab performance
- Hands-on experience with SPC, FDC, DOE, and JMP
- Strong knowledge of Photolithography, Etch, Thin Films, and CMP processes
- Proven background transferring technologies from R&D into high-volume manufacturing
- Strong communication, leadership, and teamwork skills
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