Senior Verification Engineer - SoC/ASIC IP & SerDes (San Jose)

A leading technology firm seeks an experienced engineer for its custom silicon division. Responsibilities include IP and subsystem verification for ASIC products, focusing on advanced methodologies such as UVM and System Verilog. Candidates should have a strong background in verification environments and problem-solving skills. The position offers competitive compensation, including a salary range of $141,300 - $226,000 and a comprehensive benefits package.
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