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Sr. FPGA Engineer

MicroVision

Job Description

Job Description

About us: 

With offices in the U.S. and Germany, MicroVision is at the forefront of driving the global adoption of innovative perception solutions, with the goal of making mobility and autonomy safer. Our engineering excellence, based in Florida, Washington State, Washington D.C., and Hamburg, Germany, enables us to develop and supply integrated lidar hardware and perception software solutions. Our proprietary technologies enhance safety and automation across various industrial applications, including robotics, automated warehouses, and agriculture, and are instrumental in the development of autonomous systems. MicroVision’s core technology, initially developed for the automotive industry, continues to accelerate advanced driver-assistance systems (ADAS) and autonomous driving. Building on our history of providing technology to the military segment, our target offerings include semi- and fully autonomous airborne and terrestrial sensor systems. With our solid-state lidar technologies, encompassing MEMS-based long-range lidar and flash-based short-range lidar, integrated with our onboard perception software, MicroVision possesses the expertise to deliver safe mobility at the speed of life.

Job Summary:

MicroVision has an immediate opportunity for a  Senior RTL Engineer. As a key member of MicroVision's growing  Digital Design  Engineering team, you will collaborate with various technical teams in the company to design and take into production, market defining Automotive LiDAR product. The right candidate for this position will be a highly motivated FPGA/RTL Engineer with a breadth of understanding in FPGA design and best practices, including detailed design, System Verilog coding, modelling, simulation, verification, integration and test. 

Essential Duties and Responsibilities:

  • Derive FPGA requirements based on system requirements then create FPGA architecture to fulfill those requirements 

  • Design, implement and test Register-Transfer Level (RTL) features and components guided by system architecture and requirements 

  • Own the detailed design of assigned firmware components and subsystem functionality 

  • Document test and implementation plans at unit at system levels and then execute on it. 

  • Work with other teams to integrate developed features into system hardware. 

  • Support bringing up RTL features developed by the team. 

  • Coach/mentor junior members of RTL and integration teams to complete tasks. 

  • Participate in the full software development life cycle (SDLC) flow including peer reviews of requirements, architecture, design, and code implementations within an approved ASPICE development flow. 

Required Knowledge, Skills and Abilities:

  • Knowledge of System Verilog, Verilog, Python programming languages 

  • Proficient in FPGA Design methodologies from state machine design to DSP implementation 

  • Experienced in closing timing in FPGA designs. 

  • Mapping algorithms to FPGA appropriate logic implementations 

  • Expert integrating and bringing up features in hardware. 

  • Ability to work well in a fast-moving and complex environment. 

  • Independently driven to complete project tasks 

  • Experience with Configuration Management and Change Control concepts and tools (Git, Subversion, Jira, etc.) 

  • Experience working with Functional Requirements and defining Requirement Based Tests 

  • Experience performing HDL Synthesis/Simulation (eg. VCS, Synplicity, etc.) 

  • Experience with design analyses (Timing, Lint, Clock Domain Crossings, Code Coverage, etc.) and IP compliance strategies 

  • Experience designing portable, scalable Test Benches 

  • Experience with UVM/OVM - Constrained random testing 

  • Familiarity with hierarchical simulation and verification frameworks 

  • Experience with intersystem communication protocols (I2C, UART, SPI, etc.) 

  • Familiarity with microcontroller peripherals including one or more of the following: ADCs, DACs, Flash, EEPROM, timers and watchdogs 

  • Working knowledge of data structures and algorithm fundamentals 

  • Working knowledge of digital and analog electronics 

Preferred Knowledge, Skills, and Abilities 

  • Knowledgeable of control systems and digital signal processing fundamentals 

  • Proficient in other embedded software systems developed in C / Cpp / etc. 

  • Hands on experience with High-Level Synthesis (HLS) 

  • Excellent scripting and automation skills. Bash shell, python, Make/CMake, and TCL desired 

  • Extensive project experience working on embedded laser applications including Lidar 

  • Safety-critical industry experience. (FIT analysis, etc.) 

  • Working knowledge of various computing architectures beyond FPGAs, such as DSPs, GPUs, or MCUs, and their associated hardware computing platforms used to program them 

  • Experience with ASIC design & migration from FPGA prototypes to production ASICs 

Required Education and Experience: 

  • BS in Electrical Engineering or related field and 5+ years of experience or equivalent combination of education and experience 

MicroVision offers flexible work schedule that could include a hybrid schedule of onsite and remote work subject to team and business needs. You must live and reside within commuting distance from MicroVision's office in Orlando, FL.   

We are not able to provide visa sponsorship for this position.  You must be able to work in the US without sponsorship.  

Benefits:  

MicroVision is also proud to offer a comprehensive benefit program including:   

  • Competitive compensation and equity program   

  • Choice between an HSA Medical plan or a Buy-Up PPO Medical plan   

  • Dental plan 100% employer-paid for employees

  • Vision coverage Vision coverage 100% employer-paid for employees  

  • 401k plan with company match to help you save for your future (50% of your contributions up to the first 6% of your eligible pay)   

  • Generous time off package including a flexible vacation program as well as incidental personal/sick days and floating holidays 

  • Supplemental pay for Parental Leave   

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