Hardware Security Architect

Overview The SoC Security Architect defines and drives the hardware security architecture for SoCs across a range of end applications, with deep expertise in hardware security and HW/SW interaction. The role owns and establishes the vision for future generations of security hardware. Responsibilities Define SoC hardware security architecture and requirements, including HSM specification, secure boot and Root of Trust concepts, and cryptographic IP integration strategies such as AES, SHA, PKA, PUF, and PQC. Translate security features into high-level HW/SW specifications and derive HW requirements to design a product. Lead threat modeling, risk assessments, and vulnerability analysis; translate findings into architectural mitigations and design constraints. Architect HW/SW security boundaries and co‑design flows for secure boot, firmware services, drivers, and runtime protection. Define secure key storage and provisioning using eFUSE and OTP, and develop security‑aware DFT and TEST strategies that balance coverage with attack resistance. Collaborate with architecture, RTL, verification, DFT, physical design, and software teams to embed security into implementation and validation flows. Ensure compliance with cybersecurity standards such as ISO 21434, optimize PPA trade‑offs, and drive system‑level security validation. Stay current on threats, standards, and provide technical leadership through reviews and security guidance. Align security, safety, test, and product requirements with cross‑functional teams and support customer discussions, audits, and security reviews. Ensure security, safety, and system‑level design compliance with standards such as ISO 26262 and IEC 61508. Qualifications Bachelor’s or Master’s degree in Electrical, Electronic, Computer Engineering or a related field. 10–15+ years of experience in SoC or MCU design with a strong focus on hardware security architecture and HW/SW interactions. Strong understanding of SoC architecture, AMBA/AXI interconnects, memory subsystems, and how security policies are enforced across HW/SW boundaries. Proven experience with threat modeling, risk assessment, security validation, and vulnerability analysis for SoC‑based systems. Hands‑on background with RTL design, synthesis concepts, and EDA flows sufficient to review and guide secure implementation. Excellent written and verbal communication skills for specifications, reviews, and stakeholder alignment. Equal Opportunity Statement NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and expression, marital status, status as a disabled veteran and veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. NXP will provide reasonable accommodations for otherwise qualified disabled individuals. #J-18808-Ljbffr NXP Semiconductors