Senior ASIC Design Architect & Systems Leader
Zerto
Hewlett Packard Enterprise is seeking a Distinguished Technologist, ASIC Design Architect to own the hardware architecture from concept through tape-out and silicon bring-up. The role blends deep system/RTL know-how with hands-on leadership to define requirements, partition silicon blocks, and drive tradeoffs for performance, power, area and schedule. The candidate will mentor teams, coordinate with product management, firmware, verification and foundry partners to deliver complex ASICs on time #J-18808-Ljbffr Zerto
Vacancy posted 3 days ago
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