Sign up to access all features of our service.
  • Job search
  • Favorites
  • Create a CV
    New
  • Salaries
  • Subscriptions

Principal Engineer, PCIe Verification (AI2441)

$220k - $296.4k

SiMa Technologies

DescriptionJob Title: Principal Engineer, PCIe Verification Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office) Job ID: AI2441 Description: The Design Verification (DV) engineer at SiMa is involved in the functional verification of PCIe controller and PCIe-phy at block, sub-system and MLSoC level. Will also be involved in PCIe bring-up and debug on emulator. Generate required PCIe controller and phy initialization (register programming code sequence) for PCIe bring up in Simulation, emulation and on silicon. Work on UCIe interface verification on next generation projects.Job Description:As the PCIe Design Verification Engineer, you will Participate in PCIe architecture, micro-architecture, feature discussions and reviews. Define and develop PCIe test bench components using UVM & System Verilog. Bring up and testing of PCIe in block and full-chip test environment. Develop and execute a test plan. Verification execution of PCIe EP/RC functionality and performance measurements. Lead Code coverage reviews and closure. System Verilog Assertion functional coverage development and closure. Manage debug of test and regression failures, as well emulation failures. Work closely with the Architecture, MLSoC Hardware and MLA Software teams. Work with emulation and MLSoC Software team to bring up and debug PCIe. Work in the lab on PCie interface silicon debug with software and systems team as and when needed. Required Background: BS/MS in EE (Electrical Engineering) or CS (Computer Science) with 12+ years of experience in functional verification and silicon bring-up/debug. Very good current working experience of UVM and System Verilog based verification methodology is a must. Working experience on PCIe protocols Gen4/5. Working experience on PCIe bring-up and debug on Silicon is a plus. Past working experience on UCIe protocols is a plus. Proficiency in C/C++/Python programming is a plus.Good debug and problem solving skill.Personal attributes: Can-do attitude. Strong team player. Curious, creative and good at solving problems. Execution and results-oriented. Self-driven, Thinks Big and is highly accountable. Good communication skills. The annual salary for this position ranges from $220,000 - $296,400. The actual annual salary offered will depend on several factors, including - among others - job-related skills, experience, technical expertise, qualifications, work location, and business needs. The annual salary range for this position is subject to change and may be adjusted in the future. In addition to base salary, this role is also eligible for private company equity, and a comprehensive package of employee benefits. Please note that the salary ranges listed for U.S. roles reflect base salary only and do not include equity or other forms of compensation. EEO Employer: SiMa is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Vacancy posted 3 days ago
Similar jobs that could be interesting for youBased on the Principal Engineer, PCIe Verification (AI2441) in San Jose, CA vacancy
  • $200k - $250k

    Job Title: Principal Design Verification Engineer - PCIe / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and RSUs ($300K - $350K+ total comp.)Requirements: Design Verification, High-Speed SoC, PCIe / UALink / SerDes, SystemVerilog... 
    Suggested

    CyberCoders

    Santa Clara, CA
    4 days ago
  •  ...learning machines. We lead in chip design, verification, and IP integration, empowering the...  ...technological innovation. You Are You are PCIe/CXL System Architecture Specialist who...  .... Work with customer architects and engineering teams to define suitable PCIe/CXL... 
    Suggested

    Synopsys Inc

    Sunnyvale, CA
    a month ago
  • $200k - $250k

    Job Title: Principal RTL Design Engineer - PCIe / CXL / High-Speed SoCLocation: Santa Clara, CACompensation: $200K - $250K base DOE plus bonus and...  ...floorplanning and timing closure.Work closely with the verification team on pre-silicon activities, including test plan reviews... 
    Suggested

    CyberCoders

    Santa Clara, CA
    4 days ago
  • $147.4k

     ...jobs that impact everyone's life. Join the thinkers, builders, and problem-solvers behind tomorrow’s technology. As a Principal Engineer Verification & Validation on our Research & Development team, you'll have the opportunity to merge creativity with your technical... 
    Suggested
    Local area

    Infineon Technologies

    San Jose, CA
    13 hours ago
  • $203.8k - $315.9k

    DescriptionJob Title: Principal Engineer, AI & ML Design Verification Job Location: San Jose, CA (This position requires a full-time, on-site presence in our San Jose, CA office) Job ID: AI2517 Description: The Design Verification (DV) team at SiMa is involved in the functional... 
    Suggested
    Full time
    Work experience placement
    Work at office

    SiMa Technologies

    San Jose, CA
    4 days ago
  • $180k - $250k

     ...Principal Design Engineer Team Credo is looking for a Principal Design Engineer to join our mission...  ..., design, implementation, and verification of advanced SerDes PHY Digital Signal...  ...for optical and copper Ethernet and PCIe, all leveraging the PILOT diagnostic... 

    Credo Semiconductor Inc

    San Jose, CA
    4 days ago
  • $145k - $205k

     ...dedication to advancing enterprise SSD technologies through rigorous PCIe NVMe validation and testing has established us as industry...  ...: ~ Bachelor of Science in Computer Science, Computer Engineering with 8+ years of storage-related experience, OR M.S. in CS, CE... 

    SK hynix memory solutions America Inc.

    San Jose, CA
    20 days ago
  • $142.8k - $274.8k

     ...MicrosoftOverviewMicrosoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud...  ...worldwide.#azurehwjobs#SCHIEResponsibilitiesAs a Principal Engineer - ASIC verification in the Data Processing Unit team you will be... 
    Ongoing contract
    Work at office
    Local area
    Worldwide
    3 days per week

    Microsoft

    Santa Clara, CA
    4 days ago
  • $200k - $250k

    Santa Clara, CAData Engineering - Data Infrastructure /Full-time /On-sitePlusAI is a Physical AI company pioneering AI-based virtual driver...  ....Role OverviewAs an Engineering Manager for the Simulation & Verification team at Plus.ai, you will lead the development and scaling of... 
    Full time

    Plus.ai

    Santa Clara, CA
    2 days ago
  • $154.68k - $231.7k

     ...transceivers, highly efficient analog designs, and powerful cryptographic engines. These solutions address all segments of the hard disk drive (...  ...of firmware engineers involved in the development of CXL and PCIe End Point devices of Marvell.Responsible for the planning,... 
    Permanent employment
    Full time
    Internship
    Work from home

    Marvell

    Santa Clara, CA
    13 hours ago
  • $200k - $351k

     ...Senior Principal Engineer - Signal Integrity Date: Apr 20, 2026 Location: San Jose, CA, US Summary Celestica Engineering is...  ...expert in the planning of digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues on completed... 
    Local area
    Flexible hours

    Celestica

    San Jose, CA
    1 day ago
  • $200k - $351k

     ...Province: California City: San Jose Summary Celestica Engineering is seeking a highly motivated and self-driven candidate...  ...expert in the planning of digital PCB designs, simulation, lab verification, and troubleshooting signal integrity issues on completed designs... 
    Local area
    Flexible hours

    Celestica

    San Jose, CA
    2 days ago
  •  ...A leading technology firm in San Jose seeks a Principal GenAI Software Development Engineer to automate electronics design through innovative LLM solutions...  ...collaborate on EDA workflows and optimize design verification processes, ensuring high-quality outputs. This... 

    Micron Memory Malaysia Sdn Bhd

    San Jose, CA
    13 hours ago
  • $127.88k - $223.81k

     ...review, RF structure review, BOM review, DFM/DFT review, design verification, bring-up, debug, characterization, and production release....  ...-learned across programs. Mentor senior and mid-level engineers; establish hardware design best practices, checklists, libraries... 
    Full time
    Work at office
    Immediate start

    Coherent

    Santa Clara, CA
    4 days ago
  • $207k - $230k

     ...Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based...  ...requirements. Discover more at Principal Emulation Engineer — San Jose, CA Role Overview As...  ...emulation environments that let verification teams stress-test complex ASICs before... 
    Immediate start
    Relocation
    Flexible hours

    Astera Labs

    San Jose, CA
    1 day ago
  • $107.5k - $204.5k

     ...than 100 years of experience and renowned engineering expertise to meet the needs of today's...  .... The department is seeking to hire a Principal Engineer - One Shots. What you will...  ...shot device subsystems analysis, test and verification; operational test support; supplier... 
    Contract work
    Temporary work
    For contractors
    Work experience placement
    For subcontractor
    Work at office
    Local area
    Remote work
    Work from home
    Flexible hours

    Raytheon

    San Jose, CA
    3 days ago
  •  ...Senior ASIC Verification Engineer We are seeking a highly skilled Senior ASIC Verification Engineer to join our dynamic team. This role is...  ...depth knowledge of high-speed interconnects such as Ethernet, PCIe, UCIe, CXL, and UALink ~ Familiarity with RTL verification... 
    Visa sponsorship
    Relocation package

    Netpreme

    Santa Clara, CA
    4 days ago
  • $219k - $351k

     ...partners, and communities. Samsung Semiconductor is seeking a Principal Engineer, Storage Product Standards with recognized influence across...  ...Protocol & Architecture Mastery: Deep technical knowledge of PCIe/NVMe protocols, specialized enterprise features like FDP (... 
    Flexible hours

    Samsung Semiconductor

    San Jose, CA
    9 days ago
  • $120k - $200k

     ...intersection of electromagnetics, signal processing, and systems engineering—and want your code and designs to fly—this role is for you....  ....  ~ Support prototype demonstrations, requirements verification, software development, and I&T.  What you bring to this role... 
    Permanent employment
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Night shift

    E-Space

    Saratoga, CA
    8 days ago
  •  ...ASIC Verification Engineer Join a fast-growing, well-funded silicon, systems, and solutions company pioneering a new category of semiconductor...  ...~ Should have worked on verifying interface protocols like PCIe, USB, Ethernet, DDR3/4, LPDDR, I2C/I3C, SPI, SD/SDIO/eMMC,... 

    InterSources

    San Jose, CA
    2 days ago
  • $195k - $265k

     ...in execution mode and has a world-class engineering team with decades of experience in state...  ...Key Responsibilities Specialized Verification Strategy: Develop verification...  ...Knowledge: Prior experience with Ethernet and PCIe Protocols, Serial and Parallel VIP verification... 

    Eridu AI

    Saratoga, CA
    2 days ago
  •  ...Position Details Job Title: Verification Engineer Location: San Jose, California (Onsite) Job Overview The selected engineer...  ...and verification environment development ~ Knowledge of PCIe, Ethernet, I2C, SPI, MDIO, and other relevant interfaces... 

    InterSources

    San Jose, CA
    3 days ago
  • $214.06k - $341.94k

     ...Advanced Circuit and Systems (ACAS) is looking for a highly skilled engineer that has strong background and hands-on experience on RFIC...  .... Lead efforts to perform chain and chip level design verification and production support tasks. Work closely with digital and... 
    Flexible hours

    Samsung Semiconductor

    San Jose, CA
    29 days ago
  •  ...learning machines. We lead in chip design, verification, and IP integration, empowering the...  ...innovation. As the Director of Applications Engineering, this role leads a team of Application...  ...next-generation products utilizing our PCIe/SERDES IPs. You will be accountable for... 

    Synopsys Inc

    Sunnyvale, CA
    16 days ago
  • $188k - $220k

     ...Title: Principal Clinical Engineer This position is based in our Campbell, California offices. This position is on-site & full-time Why...  ...for projects to move forward. Create and execute design verification and testing plans, leading team meetings where progress... 
    Full time
    Work experience placement
    Worldwide

    Imperative Care

    Campbell, CA
    3 days ago
  • $219k - $351k

     ...our employees, customers, partners, and communities. Principal Engineer, SOC Design What You'll Do The DRAM Development Lab (...  ...sub system at top level Work closely with architects and verification engineers to ensure sound design at SoC level. Work with... 
    Work at office
    Flexible hours

    Samsung Semiconductor

    San Jose, CA
    14 days ago
  •  ...learning machines. We lead in chip design, verification, and IP integration, empowering the...  ...are an experienced ASIC Digital Signoff Engineer with a deep passion for developing cutting...  ...interface protocols such as HDMI, MIPI, PCIe, SATA, Ethernet, USB, DP, and DDR are a... 

    Synopsys Inc

    Sunnyvale, CA
    more than 2 months ago
  • $120k - $220k

     ...expand global economies, protect space and our planet and enhance our overall quality of life. We are seeking Digital Design Verification Engineers to verify our custom ASICs for satellite and wireless telephony. Knowing Verilog, SystemVerilog, and UVM is a must, VHDL is... 
    Full time
    Work at office
    Immediate start
    Visa sponsorship
    Night shift

    E-Space

    Saratoga, CA
    21 days ago
  •  ...Role Overview We are seeking a Wafer Bonding Integration Engineer to lead the development, integration, and manufacturing transfer...  ...assessing responses and identifying potential inconsistencies or verification signals in application materials based on available... 

    nEye.ai

    Santa Clara, CA
    21 days ago
  • $148.32k - $203.94k

     ...For more information, visit: . Job Summary   The Principal Test Engineer is responsible for the development of production test...  ...products Contribute to pre-silicon test program simulation/verification and AI tool implementation Engage with design team on... 
    Work experience placement

    SiTime Corporation

    Santa Clara, CA
    16 days ago

Do you want to receive more vacancies?

Subscribe and receive similar vacancies to Principal Engineer, PCIe Verification (AI2441). Be the first to apply!