Physical Design Engineer, Timing
$100kTenstorrent
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge multi-million-gate designs on advanced process nodes and partner with cross-functional teams through final signoff and tapeout.This role is hybrid, based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA.We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.Who You AreA physical design engineer with 8+ years of experience in STA, timing closure, and advanced-node design implementation.Experienced with timing flows, constraints, clocking, CDC, RDC, derates, uncertainties, guardbanding, and final signoff.Skilled in writing and debugging SDC constraints, creating ECOs, developing closure strategies, and analyzing worst-case corners.A strong collaborator and communicator who can drive results across distributed, cross-functional engineering teams.What We NeedDrive timing convergence across blocks, partitions, sections, and top-level designs; generate and validate timing models and publish results.Analyze timing violations, develop and propagate fixes, debug timing-flow issues, and keep execution progressing through tapeout.Develop and validate bottom-up constraints while partnering with Design and DFT teams on methodology updates and closure requirements.Use Python, Perl, and Tcl for automation and flow development; experience with SPICE, PNR, placement, CTS, routing, post-route optimization, DFT, or AI-based automation is a plus.What You Will LearnHow to develop scalable timing models, constraints, and closure strategies across multiple levels of design hierarchy.How clocking, guardbanding, derates, uncertainties, CDC, RDC, and process corners influence timing convergence.How timing, physical design, Design, and DFT methodologies come together to deliver successful tapeouts.How to improve implementation and signoff workflows through scripting, automation, flow development, and emerging AI-enabled solutions.Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.This position requires access to technology that requires a U.S. export license for persons whose most recent country of citizenship or permanent residence is a U.S. EAR Country Groups D:1, E1, or E2 country. This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.
$136k - $218.5k
...Come join the team and see how you can make a lasting impact on the world.We are now looking for a motivated Senior Physical Design and Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great, join us today...SuggestedFull time- Wipro Limited in Austin, Texas is seeking a Physical Design Engineer with strong PnR, PPA optimization, and timing convergence to drive block-level design from netlist to GDSII. You will perform floorplanning, CTS, routing, and timing closure across advanced nodes, collaborating...Suggested
- We are seeking an experienced engineer for SoC Static Timing Analysis for advanced semiconductor products. This role will own end-to-end Timing Constraints and Static Timing Analysis across complex designs, driving initial constraints development and timing correlation...SuggestedFull timeWork at officeLocal area
$185.2k - $250k
...responsibilities • Work with RTL/logic designers to drive architectural... ...-area tradeoffs for physical design closure • Drive IO/Core... ...distribution, congestion analysis, timing closure, IR drop analysis,... ...with other physical design engineers as well as with the RTL/Arch....SuggestedPermanent employmentFull timeFlexible hours$100k
...seniorities.Tenstorrent is seeking an exceptional Senior-level Physical Design Engineer to drive top-level implementation of our complex AI and CPU... ..., and multi-voltage domain designs.Mastery of timing closure, EM/IR analysis, and physical verification at the chip...SuggestedPermanent employment$105.65k - $200.34k
...RoleDo you enjoy solving complex engineering challenges and pushing the... ...performance?Join Intel’s CPU Design team and help develop the... ...performance processors. As a CPU Physical Design Engineer, you will... ...for performance, power, area, timing, and manufacturability.You will...Full timeWork experience placementInternshipLocal areaImmediate startShift work$140k - $229.8k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS... ...actively seeking candidates for several physical design engineering positions in our SOC and core... ...(MMMC) clock tree synthesis, routing, timing optimization and closure, RC extraction...Work experience placementWork from home$100k
...contributors of all seniorities.Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-... ...AI SoC partitions end-to-end, including power intent, timing, and physical signoff in a modern Synopsys-based flow.Deeper...Permanent employment- ...TexasHardware & Software - Hardware /Full Time /HybridFor over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal processing. Our rockstar... ...career! Cirrus Logic is looking for an expert Physical Design Engineer to join its Implementation team....Full timeWork at officeRelocation
$100k
...contributors of all seniorities.Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-... ...EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs.Expertise with industry-...Permanent employment$168k - $264.5k
...can make a lasting impact on the world.We are looking for a physical design engineer to be a part of NVIDIA’s physical design (PD) methodology team... ...chips, but to also do it at scale, in the shortest possible time. Your work in physical design methodology directly enables...Full timeRemote work$168k - $264.5k
We are now looking for a Senior Physical Design Engineer. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU... ...floorplan, power/clock distribution, chip assembly and P&R, timing closure.Craft designs for static timing analysis, power and...Full time$128.6k - $217.2k
Senior Physical Design EngineerCategoryChip DesignLocationAustin, TXExperienceMore than 8 Years... ...are seeking a Senior Physical Design Engineer to drive Advanced Place & Route (APR) and... ...IR/EM, and verification teams to close timing, power, and physical design issues....Temporary workWork at officeWork from home- ...Technologies group, you’ll help design and manufacture our next‑generation... ...role requires a mix of strategic engineering along with hands‑on experience in physical design and large chip integration... ...and route and all aspects of timing, electrical and physical signoff....Temporary work
$200k - $300k
...Hudson River Trading (HRT) is seeking a Physical Design Engineer with a broad, versatile skillset to join our growing Hardware team. In this role... ...for high-performance, latency-critical designs Close timing across multiple modes and corners while optimizing power, performance...Work at officeLocal areaImmediate start- ...SoC Physical Design Engineer, PnR Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services... ...of design effort collaborating with architecture, CAD, timing and logic design teams, with a critical impact on delivering...Internship
- ...Job Description We are looking for a Physical Design Engineer to join our Analog Backend team and work on the digital island implementation... ...sole discretion of Renesas. Summary Type: Full-time Function: Engineering Experience level: Mid-Senior...Full time
$183k - $247.6k
Annapurna Labs designs silicon and software that accelerates innovation. Customers choose... ...that were unimaginable a short time ago—even yesterday. Our custom chips,... ...technologies. We’re looking for an ASIC Physical Design Engineer to help us trail-blaze new technologies...Local areaFlexible hours- ...ultimate goal of enabling human life on Mars.SR. SOC/ASIC PHYSICAL DESIGN ENGINEER (SILICON ENGINEERING)At SpaceX we’re leveraging our experience... ..., power/ground grid generation, place and route, timing, noise, physical verification, electromigration, voltage drop...Permanent employmentWorldwideWeekend work
$100k
...target node and foundry. This role owns physical implementation of those IP blocks end to end, from synthesis through PnR, timing closure, and GDSII signoff, and directly... ...this posting.Who You AreA hands-on physical design engineer who owns blocks end to end, with a track...Permanent employment- ...are seeking an experienced Digital Designer for SoC Implementation / Physical Design for advanced semiconductor... ..., STA, PDN, PDV and signoff.Drive timing, power, IR/EM, and physical verification... ...’s in Electrical / Electronics Engineering or related field10+ years of...Full timeWork at officeLocal area
$156k - $229k
Senior CPU Physical Design Engineer, Silicon Base pay range $156,000.00/yr - $229,000.00/yr Minimum qualifications Bachelor's degree in Electrical... ...metrics, and analyzing data trends. Knowledge of Static Timing Analysis including sign-off corner definitions. Knowledge...Full timeWorldwide$100k
...for contributors of all seniorities.Tenstorrent is seeking an Physical Design Engineer to lead cross-functional efforts to solve complex physical... ...production flows to improve engineering efficiency, turnaround time, and QoR.Optimize EDA tools and custom CAD flows using data-...Permanent employment- ...shaping the future. Whether you’re designing next-gen processors, enabling... ...world-class hardware physical design flow in a fast-paced production... ...passion for solving complex engineering challenges and driving... ...solutions for place-and-route, timing closure, power optimization,...Worldwide
$239.6k - $324.1k
Annapurna Labs, designs custom silicon powering AWS’s cloud infrastructure. Custom... ...We’re looking for a Senior Manager, Physical Design Engineering to build and lead a world-class Physical... ...on the hardest problems: multi-GHz timing closure, PDN architecture, high-speed...Local areaFlexible hours$2,000 per month
...frontier intelligence. We co-design chips, racks, software, and manufacturing... ...and staffed by leading engineers, Etched is redefining the... ...inference clusters. As a Physical Design Engineer, you will own... ...through GDSII. Drive block-level timing closure across all corners...Work at officeRelocation packageShift work$116.8k - $160k
...Infrastructure Services owns the design, planning, delivery, and... ...software, hardware, and network engineers, supply chain specialists,... ...Services (AWS) is seeking a Physical Security Engineer to join its... ...coverage), 401(k) matching, paid time off, and parental leave....Work at officeFlexible hours- ...America, Inc. in Austin, TX, is seeking a Senior Staff GPU Physical Design Engineer to shape full-chip and block-level implementation, driving... ...mentoring, and innovation, with a focus on power optimization, timing closure, and scalable design #J-18808-Ljbffr Samsung...
$211.9k - $317.9k
Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group CPU... ...innovative Central Processing Unit (CPU) design efforts that have a critical impact on industries... ..., logic design, circuits, and/or physical design to develop and verify highly critical...Work experience placementImmediate startWork from home$100k
...timelines are set as much by flow maturity as by design work. This role develops, deploys, and owns the RTL-to-GDSII methodology the IP physical design team runs on, so a new block, node... ...AreA physical design or CAD methodology engineer who has built flows that production teams...Permanent employment
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