Design Verification Engineer — First Silicon & Stock Options
Apple Inc.
Apple Inc. in Los Angeles seeks a design verification engineer to enable bug-free first silicon for IP designs. You will define DV methodologies, develop test plans, and build verification environments with stimulus, checkers, assertions, and coverage trackers. Responsibilities include stress testing in SystemVerilog/UVM, debugging regressions, and delivering RTL freeze sign-off. The role also explores LLM-assisted verification to improve efficiency and quality. #J-18808-Ljbffr Apple Inc.
Vacancy posted 2 days ago
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