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Senior SoC Lead: Chiplet Architect & Tapeout Leader

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Lattice Semiconductor is seeking a Senior SoC Chip Lead for our San Jose office. You will own chip tapeout, drive architecture decisions, and lead cross-functional teams across multiple sites to accelerate development of next-generation SoCs.

Qualifications include 20+ years in FPGA/SoC design, expert SystemVerilog and SSTA skills, and a proven track record of delivering tapeouts. This role emphasizes leadership, architecture influence, and strategic roadmap planning.

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Vacancy posted 1 day ago
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